cardbus_5632.vh

VHDLVERILOG语言实现的CARDBUS的IP源码,已经实现现场应用

module cardbus_5632 (
  CLK,
  GNTN,
  IDSEL,
  ir_n,
  lclk,
  or_n,
  pad_BAM,
  pad_bvd,
  pad_CBLOCK_n,
  pad_CIS_data,
  pad_clk_resume,
  pad_gwake,
  pad_intr,
  pad_PWM,
  pad_ready,
  pad_wp,
  pae_n,
  paf_n,
  RSTN,
  INTAN,
  ld,
  led,
  mrs,
  oe,
  pad_CAUDIO,
  pad_CINT_n,
  pad_CIS_ADR,
  pad_clk_stopped,
  pad_CSTSCHG,
  pad_locked,
  pad_owner_access,
  ren,
  REQN,
  SERRN,
  wen,
  AD,
  CBEN,
  DEVSELN,
  FRAMEN,
  IRDYN,
  lad,
  pad_CCLKRUN_n,
  PAR,
  PERRN,
  STOPN,
  TRDYN
);
input CLK;
input GNTN;
input IDSEL;
input ir_n;
input lclk;
input or_n;
input pad_BAM;
input [2:1] pad_bvd;
input pad_CBLOCK_n;
input [31:0] pad_CIS_data;
input pad_clk_resume;
input pad_gwake;
input pad_intr;
input pad_PWM;
input pad_ready;
input pad_wp;
input pae_n;
input paf_n;
input RSTN;
output INTAN;
output ld;
output [7:0] led;
output mrs;
output oe;
output pad_CAUDIO;
output pad_CINT_n;
output [9:2] pad_CIS_ADR;
output pad_clk_stopped;
output pad_CSTSCHG;
output pad_locked;
output pad_owner_access;
output ren;
output REQN;
output SERRN;
output wen;
inout [31:0] AD;
inout [3:0] CBEN;
inout DEVSELN;
inout FRAMEN;
inout IRDYN;
inout [31:0] lad;
inout pad_CCLKRUN_n;
inout PAR;
inout PERRN;
inout STOPN;
inout TRDYN;