miba.map.eqn

VHDL语言设计的秒表

-- Copyright (C) 1991-2005 Altera Corporation
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--C1_count[4] is minute:inst2|count[4]
--operation mode is arithmetic

C1_count[4]_carry_eqn = C1L10;
C1_count[4]_lut_out = C1_count[4] $ (!C1_count[4]_carry_eqn);
C1_count[4] = DFFEAS(C1_count[4]_lut_out, F1_enmin, reset, , set, , , C1L4, );

--C1L12 is minute:inst2|count[4]~274
--operation mode is arithmetic

C1L12 = CARRY(C1_count[4] & (!C1L10));


--C1_count[0] is minute:inst2|count[0]
--operation mode is arithmetic

C1_count[0]_lut_out = !C1_count[0];
C1_count[0] = DFFEAS(C1_count[0]_lut_out, F1_enmin, reset, , set, , , C1L4, );

--C1L3 is minute:inst2|count[0]~278
--operation mode is arithmetic

C1L3 = CARRY(C1_count[0]);


--E1_count[1] is zhishi:inst4|count[1]
--operation mode is normal

E1_count[1]_lut_out = !E1_count[2] & (E1_count[1] $ E1_count[0]);
E1_count[1] = DFFEAS(E1_count[1]_lut_out, clk, reset, , , , , , );


--E1_count[0] is zhishi:inst4|count[0]
--operation mode is normal

E1_count[0]_lut_out = !E1_count[0] & (!E1_count[1] # !E1_count[2]);
E1_count[0] = DFFEAS(E1_count[0]_lut_out, clk, reset, , , , , , );


--E1L5 is zhishi:inst4|daout[0]~965
--operation mode is normal

E1L5 = E1_count[1] & C1_count[4] # !E1_count[1] & (E1_count[0] & C1_count[4] # !E1_count[0] & (C1_count[0]));


--F1_count[0] is second:inst5|count[0]
--operation mode is arithmetic

F1_count[0]_lut_out = !F1_count[0];
F1_count[0] = DFFEAS(F1_count[0]_lut_out, B1_ensec, reset, , set, , , F1L4, );

--F1L3 is second:inst5|count[0]~304
--operation mode is arithmetic

F1L3 = CARRY(F1_count[0]);


--B1_count[4] is msecond:inst|count[4]
--operation mode is arithmetic

B1_count[4]_carry_eqn = B1L11;
B1_count[4]_lut_out = B1_count[4] $ (!B1_count[4]_carry_eqn);
B1_count[4] = DFFEAS(B1_count[4]_lut_out, A1L11, reset, , set, , , B1L5, );

--B1L13 is msecond:inst|count[4]~335
--operation mode is arithmetic

B1L13 = CARRY(B1_count[4] & (!B1L11));


--B1_count[0] is msecond:inst|count[0]
--operation mode is arithmetic

B1_count[0]_lut_out = !B1_count[0];
B1_count[0] = DFFEAS(B1_count[0]_lut_out, A1L11, reset, , set, , , B1L5, );

--B1L3 is msecond:inst|count[0]~339
--operation mode is arithmetic

B1L3 = CARRY(B1_count[0]);


--E1L6 is zhishi:inst4|daout[0]~966
--operation mode is normal

E1L6 = E1_count[1] & (E1_count[0]) # !E1_count[1] & (E1_count[0] & B1_count[4] # !E1_count[0] & (B1_count[0]));


--F1_count[4] is second:inst5|count[4]
--operation mode is arithmetic

F1_count[4]_carry_eqn = F1L10;
F1_count[4]_lut_out = F1_count[4] $ (!F1_count[4]_carry_eqn);
F1_count[4] = DFFEAS(F1_count[4]_lut_out, B1_ensec, reset, , set, , , F1L4, );

--F1L12 is second:inst5|count[4]~308
--operation mode is arithmetic

F1L12 = CARRY(F1_count[4] & (!F1L10));


--E1L7 is zhishi:inst4|daout[0]~967
--operation mode is normal

E1L7 = E1_count[1] & (E1L6 & (F1_count[4]) # !E1L6 & F1_count[0]) # !E1_count[1] & (E1L6);


--E1_count[2] is zhishi:inst4|count[2]
--operation mode is normal

E1_count[2]_lut_out = E1_count[2] & (!E1_count[1] & !E1_count[0]) # !E1_count[2] & (E1_count[1] & E1_count[0]);
E1_count[2] = DFFEAS(E1_count[2]_lut_out, clk, reset, , , , , , );


--E1L8 is zhishi:inst4|daout[0]~968
--operation mode is normal

E1L8 = E1_count[2] & E1L5 # !E1_count[2] & (E1L7);


--C1_count[5] is minute:inst2|count[5]
--operation mode is arithmetic

C1_count[5]_carry_eqn = C1L12;
C1_count[5]_lut_out = C1_count[5] $ (C1_count[5]_carry_eqn);
C1_count[5] = DFFEAS(C1_count[5]_lut_out, F1_enmin, reset, , set, , , C1L4, );

--C1L14 is minute:inst2|count[5]~282
--operation mode is arithmetic

C1L14 = CARRY(!C1L12 # !C1_count[5]);


--C1_count[1] is minute:inst2|count[1]
--operation mode is arithmetic

C1_count[1]_carry_eqn = C1L3;
C1_count[1]_lut_out = A1L12 $ C1_count[1] $ C1_count[1]_carry_eqn;
C1_count[1] = DFFEAS(C1_count[1]_lut_out, F1_enmin, reset, , set, , , C1L4, );

--C1L6 is minute:inst2|count[1]~286
--operation mode is arithmetic

C1L6 = CARRY(A1L12 & !C1_count[1] & !C1L3 # !A1L12 & (!C1L3 # !C1_count[1]));


--E1L9 is zhishi:inst4|daout[1]~969
--operation mode is normal

E1L9 = E1_count[1] & C1_count[5] # !E1_count[1] & (E1_count[0] & C1_count[5] # !E1_count[0] & (C1_count[1]));


--B1_count[5] is msecond:inst|count[5]
--operation mode is arithmetic

B1_count[5]_carry_eqn = B1L13;
B1_count[5]_lut_out = B1_count[5] $ (B1_count[5]_carry_eqn);
B1_count[5] = DFFEAS(B1_count[5]_lut_out, A1L11, reset, , set, , , B1L5, );

--B1L15 is msecond:inst|count[5]~343
--operation mode is arithmetic

B1L15 = CARRY(!B1L13 # !B1_count[5]);


--F1_count[1] is second:inst5|count[1]
--operation mode is arithmetic

F1_count[1]_carry_eqn = F1L3;
F1_count[1]_lut_out = A1L13 $ F1_count[1] $ F1_count[1]_carry_eqn;
F1_count[1] = DFFEAS(F1_count[1]_lut_out, B1_ensec, reset, , set, , , F1L4, );

--F1L6 is second:inst5|count[1]~312
--operation mode is arithmetic

F1L6 = CARRY(A1L13 & !F1_count[1] & !F1L3 # !A1L13 & (!F1L3 # !F1_count[1]));


--B1_count[1] is msecond:inst|count[1]
--operation mode is arithmetic

B1_count[1]_carry_eqn = B1L3;
B1_count[1]_lut_out = A1L24 $ B1_count[1] $ B1_count[1]_carry_eqn;
B1_count[1] = DFFEAS(B1_count[1]_lut_out, A1L11, reset, , set, , , B1L5, );

--B1L7 is msecond:inst|count[1]~347
--operation mode is arithmetic

B1L7 = CARRY(A1L24 & !B1_count[1] & !B1L3 # !A1L24 & (!B1L3 # !B1_count[1]));


--E1L10 is zhishi:inst4|daout[1]~970
--operation mode is normal

E1L10 = E1_count[0] & (E1_count[1]) # !E1_count[0] & (E1_count[1] & F1_count[1] # !E1_count[1] & (B1_count[1]));


--F1_count[5] is second:inst5|count[5]
--operation mode is arithmetic

F1_count[5]_carry_eqn = F1L12;
F1_count[5]_lut_out = F1_count[5] $ (F1_count[5]_carry_eqn);
F1_count[5] = DFFEAS(F1_count[5]_lut_out, B1_ensec, reset, , set, , , F1L4, );

--F1L14 is second:inst5|count[5]~316
--operation mode is arithmetic

F1L14 = CARRY(!F1L12 # !F1_count[5]);


--E1L11 is zhishi:inst4|daout[1]~971
--operation mode is normal

E1L11 = E1_count[0] & (E1L10 & (F1_count[5]) # !E1L10 & B1_count[5]) # !E1_count[0] & (E1L10);


--E1L12 is zhishi:inst4|daout[1]~972
--operation mode is normal

E1L12 = E1_count[2] & E1L9 # !E1_count[2] & (E1L11);


--C1_count[6] is minute:inst2|count[6]
--operation mode is normal

C1_count[6]_carry_eqn = C1L14;
C1_count[6]_lut_out = C1_count[6] $ (!C1_count[6]_carry_eqn);
C1_count[6] = DFFEAS(C1_count[6]_lut_out, F1_enmin, reset, , set, , , C1L4, );


--C1_count[2] is minute:inst2|count[2]
--operation mode is arithmetic

C1_count[2]_carry_eqn = C1L6;
C1_count[2]_lut_out = A1L12 $ C1_count[2] $ !C1_count[2]_carry_eqn;
C1_count[2] = DFFEAS(C1_count[2]_lut_out, F1_enmin, reset, , set, , , C1L4, );

--C1L8 is minute:inst2|count[2]~294
--operation mode is arithmetic

C1L8 = CARRY(A1L12 & (C1_count[2] # !C1L6) # !A1L12 & C1_count[2] & !C1L6);


--E1L13 is zhishi:inst4|daout[2]~973
--operation mode is normal

E1L13 = E1_count[1] & C1_count[6] # !E1_count[1] & (E1_count[0] & C1_count[6] # !E1_count[0] & (C1_count[2]));


--F1_count[2] is second:inst5|count[2]
--operation mode is arithmetic

F1_count[2]_carry_eqn = F1L6;
F1_count[2]_lut_out = A1L13 $ F1_count[2] $ !F1_count[2]_carry_eqn;
F1_count[2] = DFFEAS(F1_count[2]_lut_out, B1_ensec, reset, , set, , , F1L4, );

--F1L8 is second:inst5|count[2]~320
--operation mode is arithmetic

F1L8 = CARRY(A1L13 & (F1_count[2] # !F1L6) # !A1L13 & F1_count[2] & !F1L6);


--B1_count[6] is msecond:inst|count[6]
--operation mode is arithmetic

B1_count[6]_carry_eqn = B1L15;
B1_count[6]_lut_out = B1_count[6] $ (!B1_count[6]_carry_eqn);
B1_count[6] = DFFEAS(B1_count[6]_lut_out, A1L11, reset, , set, , , B1L5, );

--B1L17 is msecond:inst|count[6]~351
--operation mode is arithmetic

B1L17 = CARRY(B1_count[6] & (!B1L15));


--B1_count[2] is msecond:inst|count[2]
--operation mode is arithmetic

B1_count[2]_carry_eqn = B1L7;
B1_count[2]_lut_out = A1L24 $ B1_count[2] $ !B1_count[2]_carry_eqn;
B1_count[2] = DFFEAS(B1_count[2]_lut_out, A1L11, reset, , set, , , B1L5, );

--B1L9 is msecond:inst|count[2]~355
--operation mode is arithmetic

B1L9 = CARRY(A1L24 & (B1_count[2] # !B1L7) # !A1L24 & B1_count[2] & !B1L7);


--E1L14 is zhishi:inst4|daout[2]~974
--operation mode is normal

E1L14 = E1_count[1] & (E1_count[0]) # !E1_count[1] & (E1_count[0] & B1_count[6] # !E1_count[0] & (B1_count[2]));


--F1_count[6] is second:inst5|count[6]
--operation mode is normal

F1_count[6]_carry_eqn = F1L14;
F1_count[6]_lut_out = F1_count[6] $ (!F1_count[6]_carry_eqn);
F1_count[6] = DFFEAS(F1_count[6]_lut_out, B1_ensec, reset, , set, , , F1L4, );


--E1L15 is zhishi:inst4|daout[2]~975
--operation mode is normal

E1L15 = E1_count[1] & (E1L14 & (F1_count[6]) # !E1L14 & F1_count[2]) # !E1_count[1] & (E1L14);


--E1L16 is zhishi:inst4|daout[2]~976
--operation mode is normal

E1L16 = E1_count[2] & E1L13 # !E1_count[2] & (E1L15);


--F1_count[3] is second:inst5|count[3]
--operation mode is arithmetic

F1_count[3]_carry_eqn = F1L8;
F1_count[3]_lut_out = F1_count[3] $ (F1_count[3]_carry_eqn);
F1_count[3] = DFFEAS(F1_count[3]_lut_out, B1_ensec, reset, , set, , , F1L4, );

--F1L10 is second:inst5|count[3]~328
--operation mode is arithmetic

F1L10 = CARRY(!F1L8 # !F1_count[3]);


--B1_count[7] is msecond:inst|count[7]
--operation mode is normal

B1_count[7]_carry_eqn = B1L17;
B1_count[7]_lut_out = B1_count[7] $ (B1_count[7]_carry_eqn);
B1_count[7] = DFFEAS(B1_count[7]_lut_out, A1L11, reset, , set, , , B1L5, );


--E1L17 is zhishi:inst4|daout[3]~977
--operation mode is normal

E1L17 = E1_count[1] & !E1_count[0] # !E1_count[1] & E1_count[0] & B1_count[7];


--C1_count[3] is minute:inst2|count[3]
--operation mode is arithmetic

C1_count[3]_carry_eqn = C1L8;
C1_count[3]_lut_out = C1_count[3] $ (C1_count[3]_carry_eqn);
C1_count[3] = DFFEAS(C1_count[3]_lut_out, F1_enmin, reset, , set, , , C1L4, );

--C1L10 is minute:inst2|count[3]~298
--operation mode is arithmetic

C1L10 = CARRY(!C1L8 # !C1_count[3]);


--B1_count[3] is msecond:inst|count[3]
--operation mode is arithmetic

B1_count[3]_carry_eqn = B1L9;
B1_count[3]_lut_out = B1_count[3] $ (B1_count[3]_carry_eqn);
B1_count[3] = DFFEAS(B1_count[3]_lut_out, A1L11, reset, , set, , , B1L5, );

--B1L11 is msecond:inst|count[3]~363
--operation mode is arithmetic

B1L11 = CARRY(!B1L9 # !B1_count[3]);


--E1L18 is zhishi:inst4|daout[3]~978
--operation mode is normal

E1L18 = E1_count[2] & (C1_count[3] # E1L17) # !E1_count[2] & (B1_count[3] & !E1L17);


--E1L19 is zhishi:inst4|daout[3]~979
--operation mode is normal

E1L19 = E1L17 & !E1L18 & (F1_count[3] # E1_count[0]) # !E1L17 & (!E1_count[0] & E1L18);


--D1L1 is deled:inst3|led~1190
--operation mode is normal

D1L1 = E1L8 & (E1L19 # E1L12 $ E1L16) # !E1L8 & (E1L12 # E1L16 $ E1L19);


--D1L2 is deled:inst3|led~1191
--operation mode is normal

D1L2 = !E1L19 & (E1L8 & (E1L12 # !E1L16) # !E1L8 & E1L12 & !E1L16);


--D1L3 is deled:inst3|led~1192
--operation mode is normal

D1L3 = E1L16 & E1L19 & (E1L8 # E1L12);


--D1L4 is deled:inst3|led~1193
--operation mode is normal

D1L4 = D1L3 & (E1_count[2] & (!E1L9) # !E1_count[2] & !E1L11);


--D1L5 is deled:inst3|led~1194
--operation mode is normal

D1L5 = E1L8 & E1L16 & E1L19 & D1L4;


--D1L6 is deled:inst3|led~1195
--operation mode is normal

D1L6 = E1L12 & E1L8 & (!E1L19) # !E1L12 & (E1L16 & (!E1L19) # !E1L16 & E1L8);


--D1L7 is deled:inst3|led~1196
--operation mode is normal

D1L7 = D1L5 # D1L6 & (!D1L3);


--D1L8 is deled:inst3|led~1197
--operation mode is normal

D1L8 = E1L8 & (E1L16 $ (!E1L12 & !E1L19)) # !E1L8 & (E1L12 & !E1L16 & E1L19 # !E1L12 & E1L16 & !E1L19);


--D1L9 is deled:inst3|led~1198