miba.fit.eqn

VHDL语言设计的秒表

G1_enter[10]_lut_out = GND;
G1_enter[10] = DFFEAS(G1_enter[10]_lut_out, GLOBAL(clk), VCC, , , G1L52, , , VCC);


--G1_enter[9] is fenpin:inst10|enter[9] at LC_X27_Y13_N4
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[9]_lut_out = GND;
G1_enter[9] = DFFEAS(G1_enter[9]_lut_out, GLOBAL(clk), VCC, , , G1L54, , , VCC);


--G1_enter[8] is fenpin:inst10|enter[8] at LC_X27_Y13_N6
--operation mode is normal

G1_enter[8]_lut_out = G1L57;
G1_enter[8] = DFFEAS(G1_enter[8]_lut_out, GLOBAL(clk), VCC, , , , , , );


--A1L20 is rtl~430 at LC_X27_Y13_N3
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[11]_qfbk = G1_enter[11];
A1L20 = !G1_enter[10] & !G1_enter[9] & !G1_enter[11]_qfbk & !G1_enter[8];

--G1_enter[11] is fenpin:inst10|enter[11] at LC_X27_Y13_N3
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[11] = DFFEAS(A1L20, GLOBAL(clk), VCC, , , G1L49, , , VCC);


--G1_enter[12] is fenpin:inst10|enter[12] at LC_X27_Y15_N7
--operation mode is normal

G1_enter[12]_lut_out = G1L63;
G1_enter[12] = DFFEAS(G1_enter[12]_lut_out, GLOBAL(clk), VCC, , , , , , );


--A1L21 is rtl~431 at LC_X27_Y13_N7
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[13]_qfbk = G1_enter[13];
A1L21 = !G1_enter[12] & A1L20 & !G1_enter[13]_qfbk & A1L19;

--G1_enter[13] is fenpin:inst10|enter[13] at LC_X27_Y13_N7
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[13] = DFFEAS(A1L21, GLOBAL(clk), VCC, , , G1L60, , , VCC);


--G1_enter[5] is fenpin:inst10|enter[5] at LC_X26_Y16_N1
--operation mode is normal

G1_enter[5]_lut_out = !A1L11 & (G1L66);
G1_enter[5] = DFFEAS(G1_enter[5]_lut_out, GLOBAL(clk), VCC, , , , , , );


--G1_enter[6] is fenpin:inst10|enter[6] at LC_X28_Y16_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[6]_lut_out = GND;
G1_enter[6] = DFFEAS(G1_enter[6]_lut_out, GLOBAL(clk), VCC, , , G1L71, , , VCC);


--G1_enter[4] is fenpin:inst10|enter[4] at LC_X25_Y15_N2
--operation mode is normal

G1_enter[4]_lut_out = G1L74;
G1_enter[4] = DFFEAS(G1_enter[4]_lut_out, GLOBAL(clk), VCC, , , , , , );


--A1L22 is rtl~432 at LC_X26_Y16_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[7]_qfbk = G1_enter[7];
A1L22 = !G1_enter[6] & !G1_enter[4] & !G1_enter[7]_qfbk & G1_enter[5];

--G1_enter[7] is fenpin:inst10|enter[7] at LC_X26_Y16_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[7] = DFFEAS(A1L22, GLOBAL(clk), VCC, , , G1L68, , , VCC);


--G1_enter[3] is fenpin:inst10|enter[3] at LC_X25_Y16_N9
--operation mode is normal

G1_enter[3]_lut_out = !A1L11 & (G1L77);
G1_enter[3] = DFFEAS(G1_enter[3]_lut_out, GLOBAL(clk), VCC, , , , , , );


--G1_enter[1] is fenpin:inst10|enter[1] at LC_X26_Y16_N2
--operation mode is normal

G1_enter[1]_lut_out = G1L83;
G1_enter[1] = DFFEAS(G1_enter[1]_lut_out, GLOBAL(clk), VCC, , , , , , );


--G1_enter[0] is fenpin:inst10|enter[0] at LC_X27_Y16_N9
--operation mode is normal

G1_enter[0]_lut_out = !A1L11 & (G1L86);
G1_enter[0] = DFFEAS(G1_enter[0]_lut_out, GLOBAL(clk), VCC, , , , , , );


--A1L23 is rtl~433 at LC_X26_Y16_N3
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[2]_qfbk = G1_enter[2];
A1L23 = !G1_enter[1] & G1_enter[3] & !G1_enter[2]_qfbk & !G1_enter[0];

--G1_enter[2] is fenpin:inst10|enter[2] at LC_X26_Y16_N3
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[2] = DFFEAS(A1L23, GLOBAL(clk), VCC, , , G1L80, , , VCC);


--A1L11 is rtl~6 at LC_X27_Y13_N8
--operation mode is normal

A1L11 = A1L22 & A1L23 & A1L18 & A1L21;


--B1L5 is msecond:inst|count[0]~366 at LC_X11_Y21_N7
--operation mode is normal

B1L5 = !B1_count[5] & !B1_count[6];


--A1L24 is rtl~434 at LC_X12_Y21_N9
--operation mode is normal

A1L24 = B1_count[0] & B1_count[3] & !B1_count[2] & !B1_count[1];


--B1L6 is msecond:inst|count[0]~367 at LC_X12_Y21_N8
--operation mode is normal

B1L6 = B1_count[7] & (A1L24 & B1_count[4] # !B1L5);


--B1L28 is msecond:inst|ensec~271 at LC_X11_Y22_N2
--operation mode is normal

B1L28 = set & (reset);


--F1L24 is second:inst5|enmin~201 at LC_X11_Y22_N4
--operation mode is normal

F1L24 = set & (reset & F1_count[4]);


--F1L25 is second:inst5|enmin~202 at LC_X11_Y20_N9
--operation mode is normal

F1L25 = F1_enmin & B1L28 & (!A1L13) # !F1_enmin & (F1L24 & A1L13);


--B1L29 is msecond:inst|ensec~272 at LC_X11_Y21_N3
--operation mode is normal

B1L29 = !B1_count[6] & !B1_count[5] & B1_count[7] & B1_count[4];


--B1L30 is msecond:inst|ensec~273 at LC_X11_Y21_N5
--operation mode is normal

B1L30 = B1L28 & (!B1_count[5] & !B1_count[6] # !B1_count[7]);


--G1L1 is fenpin:inst10|add~481 at LC_X26_Y13_N5
--operation mode is normal

G1L1_carry_eqn = G1L3;
G1L1 = G1L1_carry_eqn $ G1_enter[31];


--G1L2 is fenpin:inst10|add~486 at LC_X26_Y13_N4
--operation mode is arithmetic

G1L2_carry_eqn = (!G1L17 & G1L5) # (G1L17 & G1L6);
G1L2 = G1_enter[30] $ !G1L2_carry_eqn;

--G1L3 is fenpin:inst10|add~488 at LC_X26_Y13_N4
--operation mode is arithmetic

G1L3 = CARRY(G1_enter[30] & !G1L6);


--G1L4 is fenpin:inst10|add~491 at LC_X26_Y13_N3
--operation mode is arithmetic

G1L4_carry_eqn = (!G1L17 & G1L8) # (G1L17 & G1L9);
G1L4 = G1_enter[29] $ G1L4_carry_eqn;

--G1L5 is fenpin:inst10|add~493 at LC_X26_Y13_N3
--operation mode is arithmetic

G1L5_cout_0 = !G1L8 # !G1_enter[29];
G1L5 = CARRY(G1L5_cout_0);

--G1L6 is fenpin:inst10|add~493COUT1_665 at LC_X26_Y13_N3
--operation mode is arithmetic

G1L6_cout_1 = !G1L9 # !G1_enter[29];
G1L6 = CARRY(G1L6_cout_1);


--G1L7 is fenpin:inst10|add~496 at LC_X26_Y13_N2
--operation mode is arithmetic

G1L7_carry_eqn = (!G1L17 & G1L11) # (G1L17 & G1L12);
G1L7 = G1_enter[28] $ (!G1L7_carry_eqn);

--G1L8 is fenpin:inst10|add~498 at LC_X26_Y13_N2
--operation mode is arithmetic

G1L8_cout_0 = G1_enter[28] & (!G1L11);
G1L8 = CARRY(G1L8_cout_0);

--G1L9 is fenpin:inst10|add~498COUT1_664 at LC_X26_Y13_N2
--operation mode is arithmetic

G1L9_cout_1 = G1_enter[28] & (!G1L12);
G1L9 = CARRY(G1L9_cout_1);


--G1L10 is fenpin:inst10|add~501 at LC_X26_Y13_N1
--operation mode is arithmetic

G1L10_carry_eqn = (!G1L17 & G1L14) # (G1L17 & G1L15);
G1L10 = G1_enter[27] $ (G1L10_carry_eqn);

--G1L11 is fenpin:inst10|add~503 at LC_X26_Y13_N1
--operation mode is arithmetic

G1L11_cout_0 = !G1L14 # !G1_enter[27];
G1L11 = CARRY(G1L11_cout_0);

--G1L12 is fenpin:inst10|add~503COUT1_663 at LC_X26_Y13_N1
--operation mode is arithmetic

G1L12_cout_1 = !G1L15 # !G1_enter[27];
G1L12 = CARRY(G1L12_cout_1);


--G1L13 is fenpin:inst10|add~506 at LC_X26_Y13_N0
--operation mode is arithmetic

G1L13_carry_eqn = G1L17;
G1L13 = G1_enter[26] $ (!G1L13_carry_eqn);

--G1L14 is fenpin:inst10|add~508 at LC_X26_Y13_N0
--operation mode is arithmetic

G1L14_cout_0 = G1_enter[26] & (!G1L17);
G1L14 = CARRY(G1L14_cout_0);

--G1L15 is fenpin:inst10|add~508COUT1_662 at LC_X26_Y13_N0
--operation mode is arithmetic

G1L15_cout_1 = G1_enter[26] & (!G1L17);
G1L15 = CARRY(G1L15_cout_1);


--G1L16 is fenpin:inst10|add~511 at LC_X26_Y14_N9
--operation mode is arithmetic

G1L16_carry_eqn = (!G1L31 & G1L19) # (G1L31 & G1L20);
G1L16 = G1_enter[25] $ G1L16_carry_eqn;

--G1L17 is fenpin:inst10|add~513 at LC_X26_Y14_N9
--operation mode is arithmetic

G1L17 = CARRY(!G1L20 # !G1_enter[25]);


--G1L18 is fenpin:inst10|add~516 at LC_X26_Y14_N8
--operation mode is arithmetic

G1L18_carry_eqn = (!G1L31 & G1L22) # (G1L31 & G1L23);
G1L18 = G1_enter[24] $ (!G1L18_carry_eqn);

--G1L19 is fenpin:inst10|add~518 at LC_X26_Y14_N8
--operation mode is arithmetic

G1L19_cout_0 = G1_enter[24] & (!G1L22);
G1L19 = CARRY(G1L19_cout_0);

--G1L20 is fenpin:inst10|add~518COUT1_661 at LC_X26_Y14_N8
--operation mode is arithmetic

G1L20_cout_1 = G1_enter[24] & (!G1L23);
G1L20 = CARRY(G1L20_cout_1);


--G1L21 is fenpin:inst10|add~521 at LC_X26_Y14_N7
--operation mode is arithmetic

G1L21_carry_eqn = (!G1L31 & G1L25) # (G1L31 & G1L26);
G1L21 = G1_enter[23] $ G1L21_carry_eqn;

--G1L22 is fenpin:inst10|add~523 at LC_X26_Y14_N7
--operation mode is arithmetic

G1L22_cout_0 = !G1L25 # !G1_enter[23];
G1L22 = CARRY(G1L22_cout_0);

--G1L23 is fenpin:inst10|add~523COUT1_660 at LC_X26_Y14_N7
--operation mode is arithmetic

G1L23_cout_1 = !G1L26 # !G1_enter[23];
G1L23 = CARRY(G1L23_cout_1);


--G1L24 is fenpin:inst10|add~526 at LC_X26_Y14_N6
--operation mode is arithmetic

G1L24_carry_eqn = (!G1L31 & G1L28) # (G1L31 & G1L29);
G1L24 = G1_enter[22] $ !G1L24_carry_eqn;

--G1L25 is fenpin:inst10|add~528 at LC_X26_Y14_N6
--operation mode is arithmetic

G1L25_cout_0 = G1_enter[22] & !G1L28;
G1L25 = CARRY(G1L25_cout_0);

--G1L26 is fenpin:inst10|add~528COUT1_659 at LC_X26_Y14_N6
--operation mode is arithmetic

G1L26_cout_1 = G1_enter[22] & !G1L29;
G1L26 = CARRY(G1L26_cout_1);


--G1L27 is fenpin:inst10|add~531 at LC_X26_Y14_N5
--operation mode is arithmetic

G1L27_carry_eqn = G1L31;
G1L27 = G1_enter[21] $ G1L27_carry_eqn;

--G1L28 is fenpin:inst10|add~533 at LC_X26_Y14_N5
--operation mode is arithmetic

G1L28_cout_0 = !G1L31 # !G1_enter[21];
G1L28 = CARRY(G1L28_cout_0);

--G1L29 is fenpin:inst10|add~533COUT1_658 at LC_X26_Y14_N5
--operation mode is arithmetic

G1L29_cout_1 = !G1L31 # !G1_enter[21];
G1L29 = CARRY(G1L29_cout_1);


--G1L30 is fenpin:inst10|add~536 at LC_X26_Y14_N4
--operation mode is arithmetic

G1L30_carry_eqn = (!G1L45 & G1L33) # (G1L45 & G1L34);
G1L30 = G1_enter[20] $ (!G1L30_carry_eqn);

--G1L31 is fenpin:inst10|add~538 at LC_X26_Y14_N4
--operation mode is arithmetic

G1L31 = CARRY(G1_enter[20] & (!G1L34));


--G1L32 is fenpin:inst10|add~541 at LC_X26_Y14_N3
--operation mode is arithmetic

G1L32_carry_eqn = (!G1L45 & G1L36) # (G1L45 & G1L37);
G1L32 = G1_enter[19] $ (G1L32_carry_eqn);

--G1L33 is fenpin:inst10|add~543 at LC_X26_Y14_N3
--operation mode is arithmetic

G1L33_cout_0 = !G1L36 # !G1_enter[19];
G1L33 = CARRY(G1L33_cout_0);

--G1L34 is fenpin:inst10|add~543COUT1_657 at LC_X26_Y14_N3
--operation mode is arithmetic

G1L34_cout_1 = !G1L37 # !G1_enter[19];
G1L34 = CARRY(G1L34_cout_1);


--G1L35 is fenpin:inst10|add~546 at LC_X26_Y14_N2
--operation mode is arithmetic

G1L35_carry_eqn = (!G1L45 & G1L39) # (G1L45 & G1L40);
G1L35 = G1_enter[18] $ !G1L35_carry_eqn;

--G1L36 is fenpin:inst10|add~548 at LC_X26_Y14_N2
--operation mode is arithmetic

G1L36_cout_0 = G1_enter[18] & !G1L39;