miba.fit.eqn

VHDL语言设计的秒表

--F1_count[6] is second:inst5|count[6] at LC_X11_Y20_N7
--operation mode is normal

F1_count[6]_carry_eqn = (!F1L13 & F1L20) # (F1L13 & F1L21);
F1_count[6]_lut_out = F1_count[6] $ (!F1_count[6]_carry_eqn);
F1_count[6] = DFFEAS(F1_count[6]_lut_out, GLOBAL(B1_ensec), GLOBAL(reset), , set, , , F1L5, );


--E1L15 is zhishi:inst4|daout[2]~975 at LC_X11_Y21_N1
--operation mode is normal

E1L15 = E1L14 & (F1_count[6] # !E1_count[1]) # !E1L14 & F1_count[2] & (E1_count[1]);


--E1L16 is zhishi:inst4|daout[2]~976 at LC_X10_Y21_N4
--operation mode is normal

E1L16 = E1_count[2] & (E1L13) # !E1_count[2] & E1L15;


--F1_count[3] is second:inst5|count[3] at LC_X11_Y20_N4
--operation mode is arithmetic

F1_count[3]_lut_out = F1_count[3] $ F1L10;
F1_count[3] = DFFEAS(F1_count[3]_lut_out, GLOBAL(B1_ensec), GLOBAL(reset), , set, , , F1L5, );

--F1L13 is second:inst5|count[3]~328 at LC_X11_Y20_N4
--operation mode is arithmetic

F1L13 = F1L14;


--B1_count[7] is msecond:inst|count[7] at LC_X12_Y21_N7
--operation mode is normal

B1_count[7]_carry_eqn = (!B1L17 & B1L24) # (B1L17 & B1L25);
B1_count[7]_lut_out = B1_count[7] $ (B1_count[7]_carry_eqn);
B1_count[7] = DFFEAS(B1_count[7]_lut_out, GLOBAL(A1L11), GLOBAL(reset), , set, , , B1L6, );


--E1L17 is zhishi:inst4|daout[3]~977 at LC_X11_Y21_N9
--operation mode is normal

E1L17 = E1_count[0] & (B1_count[7] & !E1_count[1]) # !E1_count[0] & (E1_count[1]);


--C1_count[3] is minute:inst2|count[3] at LC_X10_Y20_N4
--operation mode is arithmetic

C1_count[3]_lut_out = C1_count[3] $ C1L10;
C1_count[3] = DFFEAS(C1_count[3]_lut_out, GLOBAL(F1_enmin), GLOBAL(reset), , set, , , C1L5, );

--C1L13 is minute:inst2|count[3]~298 at LC_X10_Y20_N4
--operation mode is arithmetic

C1L13 = C1L14;


--B1_count[3] is msecond:inst|count[3] at LC_X12_Y21_N3
--operation mode is arithmetic

B1_count[3]_lut_out = B1_count[3] $ B1L11;
B1_count[3] = DFFEAS(B1_count[3]_lut_out, GLOBAL(A1L11), GLOBAL(reset), , set, , , B1L6, );

--B1L14 is msecond:inst|count[3]~363 at LC_X12_Y21_N3
--operation mode is arithmetic

B1L14_cout_0 = !B1L11 # !B1_count[3];
B1L14 = CARRY(B1L14_cout_0);

--B1L15 is msecond:inst|count[3]~363COUT1 at LC_X12_Y21_N3
--operation mode is arithmetic

B1L15_cout_1 = !B1L12 # !B1_count[3];
B1L15 = CARRY(B1L15_cout_1);


--E1L18 is zhishi:inst4|daout[3]~978 at LC_X10_Y21_N6
--operation mode is normal

E1L18 = E1_count[2] & (C1_count[3] # E1L17) # !E1_count[2] & (B1_count[3] & !E1L17);


--E1L19 is zhishi:inst4|daout[3]~979 at LC_X10_Y21_N9
--operation mode is normal

E1L19 = E1L17 & !E1L18 & (F1_count[3] # E1_count[0]) # !E1L17 & (!E1_count[0] & E1L18);


--D1L1 is deled:inst3|led~1190 at LC_X9_Y21_N9
--operation mode is normal

D1L1 = E1L8 & (E1L19 # E1L12 $ E1L16) # !E1L8 & (E1L12 # E1L19 $ E1L16);


--D1L2 is deled:inst3|led~1191 at LC_X9_Y21_N1
--operation mode is normal

D1L2 = !E1L19 & (E1L8 & (E1L12 # !E1L16) # !E1L8 & E1L12 & !E1L16);


--D1L3 is deled:inst3|led~1192 at LC_X9_Y21_N2
--operation mode is normal

D1L3 = E1L19 & E1L16 & (E1L8 # E1L12);


--D1L4 is deled:inst3|led~1193 at LC_X9_Y20_N4
--operation mode is normal

D1L4 = D1L3 & (E1_count[2] & !E1L9 # !E1_count[2] & (!E1L11));


--D1L5 is deled:inst3|led~1194 at LC_X9_Y20_N7
--operation mode is normal

D1L5 = E1L16 & E1L19 & D1L4 & E1L8;


--D1L6 is deled:inst3|led~1195 at LC_X9_Y21_N5
--operation mode is normal

D1L6 = E1L12 & E1L8 & !E1L19 # !E1L12 & (E1L16 & (!E1L19) # !E1L16 & E1L8);


--D1L7 is deled:inst3|led~1196 at LC_X9_Y21_N4
--operation mode is normal

D1L7 = D1L5 # !D1L3 & D1L6;


--D1L8 is deled:inst3|led~1197 at LC_X9_Y21_N6
--operation mode is normal

D1L8 = E1L8 & (E1L16 $ (!E1L19 & !E1L12)) # !E1L8 & (E1L19 & E1L12 & !E1L16 # !E1L19 & !E1L12 & E1L16);


--D1L9 is deled:inst3|led~1198 at LC_X9_Y21_N7
--operation mode is normal

D1L9 = E1L8 & E1L19 & E1L12 & !E1L16;


--D1L10 is deled:inst3|led~1199 at LC_X9_Y21_N8
--operation mode is normal

D1L10 = E1L8 # E1L19 # E1L16 # !E1L12;


--D1L11 is deled:inst3|led~1200 at LC_X10_Y21_N2
--operation mode is normal

D1L11 = E1L19 & (E1L16 # E1L12 & E1L8);


--D1L12 is deled:inst3|led~1201 at LC_X10_Y21_N7
--operation mode is normal

D1L12 = D1L9 # !D1L11 & D1L10;


--D1L13 is deled:inst3|led~1202 at LC_X9_Y21_N0
--operation mode is normal

D1L13 = E1L8 & (E1L12 & E1L19 # !E1L12 & (E1L16)) # !E1L8 & E1L16 & (E1L19 # E1L12);


--D1L14 is deled:inst3|led~1203 at LC_X9_Y21_N3
--operation mode is normal

D1L14 = D1L5 # !D1L13 & !D1L3;


--D1L15 is deled:inst3|led~1204 at LC_X10_Y21_N8
--operation mode is normal

D1L15 = !E1L12 & !E1L19 & (E1L16 $ E1L8);


--D1L16 is deled:inst3|led~1205 at LC_X10_Y21_N3
--operation mode is normal

D1L16 = D1L11 & D1L9 # !D1L11 & (D1L15);


--F1_enmin is second:inst5|enmin at LC_X9_Y20_N0
--operation mode is normal

F1_enmin_lut_out = F1L25 & F1_count[6] & (F1_enmin $ !F1_count[5]) # !F1L25 & F1_enmin;
F1_enmin = DFFEAS(F1_enmin_lut_out, GLOBAL(B1_ensec), VCC, , , , , , );


--A1L12 is rtl~422 at LC_X10_Y20_N8
--operation mode is normal

A1L12 = C1_count[0] & C1_count[3] & !C1_count[1] & !C1_count[2];


--C1L5 is minute:inst2|count[0]~301 at LC_X10_Y20_N0
--operation mode is normal

C1L5 = C1_count[6] & (C1_count[5] # A1L12 & C1_count[4]);


--B1_ensec is msecond:inst|ensec at LC_X11_Y21_N8
--operation mode is normal

B1_ensec_lut_out = B1L30 & A1L24 & (B1_ensec # B1L29) # !B1L30 & (B1_ensec);
B1_ensec = DFFEAS(B1_ensec_lut_out, GLOBAL(A1L11), VCC, , , , , , );


--A1L13 is rtl~423 at LC_X11_Y20_N8
--operation mode is normal

A1L13 = F1_count[0] & F1_count[3] & !F1_count[1] & !F1_count[2];


--F1L5 is second:inst5|count[0]~331 at LC_X11_Y20_N0
--operation mode is normal

F1L5 = F1_count[6] & (F1_count[5] # F1_count[4] & A1L13);


--G1_enter[30] is fenpin:inst10|enter[30] at LC_X26_Y13_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[30]_lut_out = GND;
G1_enter[30] = DFFEAS(G1_enter[30]_lut_out, GLOBAL(clk), VCC, , , G1L2, , , VCC);


--G1_enter[29] is fenpin:inst10|enter[29] at LC_X26_Y13_N8
--operation mode is normal

G1_enter[29]_lut_out = G1L4;
G1_enter[29] = DFFEAS(G1_enter[29]_lut_out, GLOBAL(clk), VCC, , , , , , );


--G1_enter[28] is fenpin:inst10|enter[28] at LC_X26_Y13_N6
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[28]_lut_out = GND;
G1_enter[28] = DFFEAS(G1_enter[28]_lut_out, GLOBAL(clk), VCC, , , G1L7, , , VCC);


--A1L14 is rtl~424 at LC_X27_Y13_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[31]_qfbk = G1_enter[31];
A1L14 = !G1_enter[29] & !G1_enter[30] & !G1_enter[31]_qfbk & !G1_enter[28];

--G1_enter[31] is fenpin:inst10|enter[31] at LC_X27_Y13_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[31] = DFFEAS(A1L14, GLOBAL(clk), VCC, , , G1L1, , , VCC);


--G1_enter[26] is fenpin:inst10|enter[26] at LC_X26_Y13_N7
--operation mode is normal

G1_enter[26]_lut_out = G1L13;
G1_enter[26] = DFFEAS(G1_enter[26]_lut_out, GLOBAL(clk), VCC, , , , , , );


--G1_enter[25] is fenpin:inst10|enter[25] at LC_X26_Y17_N2
--operation mode is normal

G1_enter[25]_lut_out = G1L16;
G1_enter[25] = DFFEAS(G1_enter[25]_lut_out, GLOBAL(clk), VCC, , , , , , );


--G1_enter[24] is fenpin:inst10|enter[24] at LC_X27_Y14_N7
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[24]_lut_out = GND;
G1_enter[24] = DFFEAS(G1_enter[24]_lut_out, GLOBAL(clk), VCC, , , G1L18, , , VCC);


--A1L15 is rtl~425 at LC_X27_Y13_N1
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[27]_qfbk = G1_enter[27];
A1L15 = !G1_enter[24] & !G1_enter[26] & !G1_enter[27]_qfbk & !G1_enter[25];

--G1_enter[27] is fenpin:inst10|enter[27] at LC_X27_Y13_N1
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[27] = DFFEAS(A1L15, GLOBAL(clk), VCC, , , G1L10, , , VCC);


--G1_enter[22] is fenpin:inst10|enter[22] at LC_X26_Y12_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[22]_lut_out = GND;
G1_enter[22] = DFFEAS(G1_enter[22]_lut_out, GLOBAL(clk), VCC, , , G1L24, , , VCC);


--G1_enter[21] is fenpin:inst10|enter[21] at LC_X26_Y12_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[21]_lut_out = GND;
G1_enter[21] = DFFEAS(G1_enter[21]_lut_out, GLOBAL(clk), VCC, , , G1L27, , , VCC);


--G1_enter[20] is fenpin:inst10|enter[20] at LC_X26_Y12_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[20]_lut_out = GND;
G1_enter[20] = DFFEAS(G1_enter[20]_lut_out, GLOBAL(clk), VCC, , , G1L30, , , VCC);


--A1L16 is rtl~426 at LC_X26_Y12_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[23]_qfbk = G1_enter[23];
A1L16 = !G1_enter[22] & !G1_enter[20] & !G1_enter[23]_qfbk & !G1_enter[21];

--G1_enter[23] is fenpin:inst10|enter[23] at LC_X26_Y12_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[23] = DFFEAS(A1L16, GLOBAL(clk), VCC, , , G1L21, , , VCC);


--G1_enter[18] is fenpin:inst10|enter[18] at LC_X28_Y13_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[18]_lut_out = GND;
G1_enter[18] = DFFEAS(G1_enter[18]_lut_out, GLOBAL(clk), VCC, , , G1L35, , , VCC);


--G1_enter[17] is fenpin:inst10|enter[17] at LC_X28_Y13_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[17]_lut_out = GND;
G1_enter[17] = DFFEAS(G1_enter[17]_lut_out, GLOBAL(clk), VCC, , , G1L38, , , VCC);


--G1_enter[16] is fenpin:inst10|enter[16] at LC_X28_Y13_N3
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[16]_lut_out = GND;
G1_enter[16] = DFFEAS(G1_enter[16]_lut_out, GLOBAL(clk), VCC, , , G1L41, , , VCC);


--A1L17 is rtl~427 at LC_X28_Y13_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[19]_qfbk = G1_enter[19];
A1L17 = !G1_enter[18] & !G1_enter[16] & !G1_enter[19]_qfbk & !G1_enter[17];

--G1_enter[19] is fenpin:inst10|enter[19] at LC_X28_Y13_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[19] = DFFEAS(A1L17, GLOBAL(clk), VCC, , , G1L32, , , VCC);


--A1L18 is rtl~428 at LC_X27_Y13_N2
--operation mode is normal

A1L18 = A1L16 & A1L17 & A1L14 & A1L15;


--G1_enter[14] is fenpin:inst10|enter[14] at LC_X27_Y13_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[14]_lut_out = GND;
G1_enter[14] = DFFEAS(G1_enter[14]_lut_out, GLOBAL(clk), VCC, , , G1L46, , , VCC);


--A1L19 is rtl~429 at LC_X27_Y13_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[15]_qfbk = G1_enter[15];
A1L19 = !G1_enter[15]_qfbk & !G1_enter[14];

--G1_enter[15] is fenpin:inst10|enter[15] at LC_X27_Y13_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

G1_enter[15] = DFFEAS(A1L19, GLOBAL(clk), VCC, , , G1L44, , , VCC);


--G1_enter[10] is fenpin:inst10|enter[10] at LC_X28_Y15_N6
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.