second.map.eqn

VHDL语言设计的秒表

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--A1L28Q is enmin~reg0
--operation mode is normal

A1L28Q_lut_out = A1L26 & (A1L27 & A1L30 # !A1L27 & (A1L28Q)) # !A1L26 & (A1L28Q);
A1L28Q = DFFEAS(A1L28Q_lut_out, clk, VCC, , , , , , );


--count[0] is count[0]
--operation mode is arithmetic

count[0]_lut_out = !count[0];
count[0] = DFFEAS(count[0]_lut_out, clk, reset, , setsec, , , A1L5, );

--A1L4 is count[0]~300
--operation mode is arithmetic

A1L4 = CARRY(count[0]);


--count[1] is count[1]
--operation mode is arithmetic

count[1]_carry_eqn = A1L4;
count[1]_lut_out = A1L30 $ count[1] $ count[1]_carry_eqn;
count[1] = DFFEAS(count[1]_lut_out, clk, reset, , setsec, , , A1L5, );

--A1L7 is count[1]~304
--operation mode is arithmetic

A1L7 = CARRY(A1L30 & !count[1] & !A1L4 # !A1L30 & (!A1L4 # !count[1]));


--count[2] is count[2]
--operation mode is arithmetic

count[2]_carry_eqn = A1L7;
count[2]_lut_out = A1L30 $ count[2] $ !count[2]_carry_eqn;
count[2] = DFFEAS(count[2]_lut_out, clk, reset, , setsec, , , A1L5, );

--A1L9 is count[2]~308
--operation mode is arithmetic

A1L9 = CARRY(A1L30 & (count[2] # !A1L7) # !A1L30 & count[2] & !A1L7);


--count[3] is count[3]
--operation mode is arithmetic

count[3]_carry_eqn = A1L9;
count[3]_lut_out = count[3] $ (count[3]_carry_eqn);
count[3] = DFFEAS(count[3]_lut_out, clk, reset, , setsec, , , A1L5, );

--A1L11 is count[3]~312
--operation mode is arithmetic

A1L11 = CARRY(!A1L9 # !count[3]);


--count[4] is count[4]
--operation mode is arithmetic

count[4]_carry_eqn = A1L11;
count[4]_lut_out = count[4] $ (!count[4]_carry_eqn);
count[4] = DFFEAS(count[4]_lut_out, clk, reset, , setsec, , , A1L5, );

--A1L13 is count[4]~316
--operation mode is arithmetic

A1L13 = CARRY(count[4] & (!A1L11));


--count[5] is count[5]
--operation mode is arithmetic

count[5]_carry_eqn = A1L13;
count[5]_lut_out = count[5] $ (count[5]_carry_eqn);
count[5] = DFFEAS(count[5]_lut_out, clk, reset, , setsec, , , A1L5, );

--A1L15 is count[5]~320
--operation mode is arithmetic

A1L15 = CARRY(!A1L13 # !count[5]);


--count[6] is count[6]
--operation mode is normal

count[6]_carry_eqn = A1L15;
count[6]_lut_out = count[6] $ (!count[6]_carry_eqn);
count[6] = DFFEAS(count[6]_lut_out, clk, reset, , setsec, , , A1L5, );


--A1L30 is rtl~45
--operation mode is normal

A1L30 = count[0] & count[3] & !count[1] & !count[2];


--A1L26 is enmin~206
--operation mode is normal

A1L26 = setsec & (count[4] # A1L28Q);


--A1L27 is enmin~207
--operation mode is normal

A1L27 = reset & (count[6] & !count[5] # !count[6] & (A1L28Q));


--A1L5 is count[0]~327
--operation mode is normal

A1L5 = count[6] & (count[5] # count[4] & A1L30);


--setsec is setsec
--operation mode is input

setsec = INPUT();


--reset is reset
--operation mode is input

reset = INPUT();


--clk is clk
--operation mode is input

clk = INPUT();


--enmin is enmin
--operation mode is output

enmin = OUTPUT(A1L28Q);


--daout[0] is daout[0]
--operation mode is output

daout[0] = OUTPUT(count[0]);


--daout[1] is daout[1]
--operation mode is output

daout[1] = OUTPUT(count[1]);


--daout[2] is daout[2]
--operation mode is output

daout[2] = OUTPUT(count[2]);


--daout[3] is daout[3]
--operation mode is output

daout[3] = OUTPUT(count[3]);


--daout[4] is daout[4]
--operation mode is output

daout[4] = OUTPUT(count[4]);


--daout[5] is daout[5]
--operation mode is output

daout[5] = OUTPUT(count[5]);


--daout[6] is daout[6]
--operation mode is output

daout[6] = OUTPUT(count[6]);