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📄 booth_multiplier.tan.qmsg

📁 这是一个用vhdl硬件描述语言实现的乘法器而不是多路选择器
💻 QMSG
📖 第 1 页 / 共 4 页
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{ "Info" "ITDB_FULL_TCO_RESULT" "clock ready ready~reg0 14.700 ns register " "Info: tco from clock \"clock\" to destination pin \"ready\" through register \"ready~reg0\" is 14.700 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clock source 1.900 ns + Longest register " "Info: + Longest clock path from clock \"clock\" to source register is 1.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns clock 1 CLK PIN_79 19 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = PIN_79; Fanout = 19; CLK Node = 'clock'" {  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "" { clock } "NODE_NAME" } "" } } { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 9 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(0.000 ns) 1.900 ns ready~reg0 2 REG LC1_C27 1 " "Info: 2: + IC(1.400 ns) + CELL(0.000 ns) = 1.900 ns; Loc. = LC1_C27; Fanout = 1; REG Node = 'ready~reg0'" {  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "1.400 ns" { clock ready~reg0 } "NODE_NAME" } "" } } { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 94 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.500 ns 26.32 % " "Info: Total cell delay = 0.500 ns ( 26.32 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.400 ns 73.68 % " "Info: Total interconnect delay = 1.400 ns ( 73.68 % )" {  } {  } 0}  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "1.900 ns" { clock ready~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.900 ns" { clock clock~out ready~reg0 } { 0.000ns 0.000ns 1.400ns } { 0.000ns 0.500ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.100 ns + " "Info: + Micro clock to output delay of source is 1.100 ns" {  } { { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 94 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "11.700 ns + Longest register pin " "Info: + Longest register to pin delay is 11.700 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns ready~reg0 1 REG LC1_C27 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC1_C27; Fanout = 1; REG Node = 'ready~reg0'" {  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "" { ready~reg0 } "NODE_NAME" } "" } } { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 94 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.100 ns) + CELL(8.600 ns) 11.700 ns ready 2 PIN PIN_120 0 " "Info: 2: + IC(3.100 ns) + CELL(8.600 ns) = 11.700 ns; Loc. = PIN_120; Fanout = 0; PIN Node = 'ready'" {  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "11.700 ns" { ready~reg0 ready } "NODE_NAME" } "" } } { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 11 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.600 ns 73.50 % " "Info: Total cell delay = 8.600 ns ( 73.50 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.100 ns 26.50 % " "Info: Total interconnect delay = 3.100 ns ( 26.50 % )" {  } {  } 0}  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "11.700 ns" { ready~reg0 ready } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "11.700 ns" { ready~reg0 ready } { 0.000ns 3.100ns } { 0.000ns 8.600ns } } }  } 0}  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "1.900 ns" { clock ready~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.900 ns" { clock clock~out ready~reg0 } { 0.000ns 0.000ns 1.400ns } { 0.000ns 0.500ns 0.000ns } } } { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "11.700 ns" { ready~reg0 ready } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "11.700 ns" { ready~reg0 ready } { 0.000ns 3.100ns } { 0.000ns 8.600ns } } }  } 0}
{ "Info" "ITDB_TH_RESULT" "mdreg\[3\] multiplicand\[3\] clock -5.100 ns register " "Info: th for register \"mdreg\[3\]\" (data pin = \"multiplicand\[3\]\", clock pin = \"clock\") is -5.100 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clock destination 1.900 ns + Longest register " "Info: + Longest clock path from clock \"clock\" to destination register is 1.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns clock 1 CLK PIN_79 19 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = PIN_79; Fanout = 19; CLK Node = 'clock'" {  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "" { clock } "NODE_NAME" } "" } } { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 9 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(0.000 ns) 1.900 ns mdreg\[3\] 2 REG LC4_C31 1 " "Info: 2: + IC(1.400 ns) + CELL(0.000 ns) = 1.900 ns; Loc. = LC4_C31; Fanout = 1; REG Node = 'mdreg\[3\]'" {  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "1.400 ns" { clock mdreg[3] } "NODE_NAME" } "" } } { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 16 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.500 ns 26.32 % " "Info: Total cell delay = 0.500 ns ( 26.32 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.400 ns 73.68 % " "Info: Total interconnect delay = 1.400 ns ( 73.68 % )" {  } {  } 0}  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "1.900 ns" { clock mdreg[3] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.900 ns" { clock clock~out mdreg[3] } { 0.000ns 0.000ns 1.400ns } { 0.000ns 0.500ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TH_DELAY" "0.900 ns + " "Info: + Micro hold delay of destination is 0.900 ns" {  } { { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 16 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.900 ns - Shortest pin register " "Info: - Shortest pin to register delay is 7.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.100 ns) 3.100 ns multiplicand\[3\] 1 PIN PIN_70 1 " "Info: 1: + IC(0.000 ns) + CELL(3.100 ns) = 3.100 ns; Loc. = PIN_70; Fanout = 1; PIN Node = 'multiplicand\[3\]'" {  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "" { multiplicand[3] } "NODE_NAME" } "" } } { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.800 ns) + CELL(1.000 ns) 7.900 ns mdreg\[3\] 2 REG LC4_C31 1 " "Info: 2: + IC(3.800 ns) + CELL(1.000 ns) = 7.900 ns; Loc. = LC4_C31; Fanout = 1; REG Node = 'mdreg\[3\]'" {  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "4.800 ns" { multiplicand[3] mdreg[3] } "NODE_NAME" } "" } } { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 16 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.100 ns 51.90 % " "Info: Total cell delay = 4.100 ns ( 51.90 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.800 ns 48.10 % " "Info: Total interconnect delay = 3.800 ns ( 48.10 % )" {  } {  } 0}  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "7.900 ns" { multiplicand[3] mdreg[3] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.900 ns" { multiplicand[3] multiplicand[3]~out mdreg[3] } { 0.000ns 0.000ns 3.800ns } { 0.000ns 3.100ns 1.000ns } } }  } 0}  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "1.900 ns" { clock mdreg[3] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.900 ns" { clock clock~out mdreg[3] } { 0.000ns 0.000ns 1.400ns } { 0.000ns 0.500ns 0.000ns } } } { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "7.900 ns" { multiplicand[3] mdreg[3] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.900 ns" { multiplicand[3] multiplicand[3]~out mdreg[3] } { 0.000ns 0.000ns 3.800ns } { 0.000ns 3.100ns 1.000ns } } }  } 0}
{ "Info" "ITDB_FULL_MIN_TCO_RESULT" "clock product\[6\] product\[6\]~reg0 12.400 ns register " "Info: Minimum tco from clock \"clock\" to destination pin \"product\[6\]\" through register \"product\[6\]~reg0\" is 12.400 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clock source 1.900 ns + Shortest register " "Info: + Shortest clock path from clock \"clock\" to source register is 1.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns clock 1 CLK PIN_79 19 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = PIN_79; Fanout = 19; CLK Node = 'clock'" {  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "" { clock } "NODE_NAME" } "" } } { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 9 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(0.000 ns) 1.900 ns product\[6\]~reg0 2 REG LC3_C34 5 " "Info: 2: + IC(1.400 ns) + CELL(0.000 ns) = 1.900 ns; Loc. = LC3_C34; Fanout = 5; REG Node = 'product\[6\]~reg0'" {  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "1.400 ns" { clock product[6]~reg0 } "NODE_NAME" } "" } } { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 58 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.500 ns 26.32 % " "Info: Total cell delay = 0.500 ns ( 26.32 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.400 ns 73.68 % " "Info: Total interconnect delay = 1.400 ns ( 73.68 % )" {  } {  } 0}  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "1.900 ns" { clock product[6]~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.900 ns" { clock clock~out product[6]~reg0 } { 0.0ns 0.0ns 1.4ns } { 0.0ns 0.5ns 0.0ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.100 ns + " "Info: + Micro clock to output delay of source is 1.100 ns" {  } { { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 58 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.400 ns + Shortest register pin " "Info: + Shortest register to pin delay is 9.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns product\[6\]~reg0 1 REG LC3_C34 5 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC3_C34; Fanout = 5; REG Node = 'product\[6\]~reg0'" {  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "" { product[6]~reg0 } "NODE_NAME" } "" } } { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 58 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.800 ns) + CELL(8.600 ns) 9.400 ns product\[6\] 2 PIN PIN_14 0 " "Info: 2: + IC(0.800 ns) + CELL(8.600 ns) = 9.400 ns; Loc. = PIN_14; Fanout = 0; PIN Node = 'product\[6\]'" {  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "9.400 ns" { product[6]~reg0 product[6] } "NODE_NAME" } "" } } { "booth_multiplier.vhd" "" { Text "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/booth_multiplier.vhd" 10 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.600 ns 91.49 % " "Info: Total cell delay = 8.600 ns ( 91.49 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.800 ns 8.51 % " "Info: Total interconnect delay = 0.800 ns ( 8.51 % )" {  } {  } 0}  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "9.400 ns" { product[6]~reg0 product[6] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.400 ns" { product[6]~reg0 product[6] } { 0.0ns 0.8ns } { 0.0ns 8.6ns } } }  } 0}  } { { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "1.900 ns" { clock product[6]~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.900 ns" { clock clock~out product[6]~reg0 } { 0.0ns 0.0ns 1.4ns } { 0.0ns 0.5ns 0.0ns } } } { "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" "" { Report "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier_cmp.qrpt" Compiler "booth_multiplier" "UNKNOWN" "V1" "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/db/booth_multiplier.quartus_db" { Floorplan "E:/workroom/产品/开放式CPU实验教学系统TEC-CA/TEC-CA出厂光盘/实验/6-booth_multiplier/" "" "9.400 ns" { product[6]~reg0 product[6] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.400 ns" { product[6]~reg0 product[6] } { 0.0ns 0.8ns } { 0.0ns 8.6ns } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1  Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Tue Aug 23 16:23:28 2005 " "Info: Processing ended: Tue Aug 23 16:23:28 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0}  } {  } 0}
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