2fsk_final.tan.summary

全数字fsk调制解调的实现 verilog源码

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 1.600 ns
From           : din[7]
To             : mx_7821:inst6|dout[7]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 28.600 ns
From           : f2_zb:inst19|rom16_1:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~reg_ra3
To             : fsk[7]
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 0.300 ns
From           : din[7]
To             : mx_7821:inst6|dout[7]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 34.01 MHz ( period = 29.400 ns )
From           : lpf:inst3|p[1]
To             : lpf:inst3|dout
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Clock Hold: 'clk'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : lpf:inst3|dout
To             : pj:inst7|dout
From Clock     : clk
To Clock       : clk
Failed Paths   : 3

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 3

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