📄 2fsk_final.vwf

📁 全数字fsk调制解调的实现 verilog源码
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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/

/*
Copyright (C) 1991-2007 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/

HEADER
{
	VERSION = 1;
	TIME_UNIT = ns;
	DATA_OFFSET = 0.0;
	DATA_DURATION = 5000000.0;
	SIMULATION_TIME = 5000000.0;
	GRID_PHASE = 0.0;
	GRID_PERIOD = 10.0;
	GRID_DUTY_CYCLE = 50;
}

SIGNAL("bsyn")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("clk")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("dout1")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("fsk")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 8;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("fsk[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "fsk";
}

SIGNAL("fsk[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "fsk";
}

SIGNAL("fsk[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "fsk";
}

SIGNAL("fsk[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "fsk";
}

SIGNAL("fsk[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "fsk";
}

SIGNAL("fsk[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "fsk";
}

SIGNAL("fsk[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "fsk";
}

SIGNAL("fsk[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "fsk";
}

SIGNAL("lpf")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("mout")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("rd")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("pulse")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("wf")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("zx")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("div64")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

TRANSITION_LIST("bsyn")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 15330.2;
		NODE
		{
			REPEAT = 7;
			LEVEL 1 FOR 30720.0;
			LEVEL 0 FOR 40960.0;
		}
		LEVEL 1 FOR 61440.0;
		NODE
		{
			REPEAT = 2;
			LEVEL 0 FOR 40960.0;
			LEVEL 1 FOR 51200.0;
		}
		NODE
		{
			REPEAT = 51;
			LEVEL 0 FOR 40960.0;
			LEVEL 1 FOR 40960.0;
		}
		LEVEL 0 FOR 40960.0;
		LEVEL 1 FOR 18269.8;
	}
}

TRANSITION_LIST("clk")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 500000;
			LEVEL 0 FOR 5.0;
			LEVEL 1 FOR 5.0;
		}
	}
}

TRANSITION_LIST("dout1")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 517091.4;
		LEVEL 1 FOR 102400.0;
		LEVEL 0 FOR 92160.0;
		LEVEL 1 FOR 92160.0;
		LEVEL 0 FOR 81920.0;
		LEVEL 1 FOR 163840.0;
		LEVEL 0 FOR 163840.0;
		LEVEL 1 FOR 409600.0;
		LEVEL 0 FOR 245760.0;
		LEVEL 1 FOR 163840.0;
		LEVEL 0 FOR 81920.0;
		LEVEL 1 FOR 245760.0;
		NODE
		{
			REPEAT = 2;
			LEVEL 0 FOR 81920.0;
			LEVEL 1 FOR 81920.0;
		}
		LEVEL 0 FOR 327680.0;
		LEVEL 1 FOR 81920.0;
		LEVEL 0 FOR 163840.0;
		LEVEL 1 FOR 81920.0;
		LEVEL 0 FOR 81920.0;
		LEVEL 1 FOR 163840.0;
		LEVEL 0 FOR 163840.0;
		LEVEL 1 FOR 409600.0;
		LEVEL 0 FOR 245760.0;
		LEVEL 1 FOR 163840.0;
		LEVEL 0 FOR 81920.0;
		LEVEL 1 FOR 245760.0;
		LEVEL 0 FOR 81920.0;
		LEVEL 1 FOR 18268.6;
	}
}

TRANSITION_LIST("fsk[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 10858.6;
		NODE
		{
			REPEAT = 21;
			LEVEL 0 FOR 8960.0;
			LEVEL 1 FOR 11520.0;
		}
		LEVEL 0 FOR 8960.0;
		LEVEL 1 FOR 6079.5;
		NODE
		{
			REPEAT = 7;
			LEVEL 0 FOR 4480.0;
			LEVEL 1 FOR 5760.0;
		}
		LEVEL 0 FOR 4480.0;
		LEVEL 1 FOR 11200.5;
		NODE
		{
			REPEAT = 7;
			LEVEL 0 FOR 8960.0;
			LEVEL 1 FOR 11520.0;
		}
		LEVEL 0 FOR 8960.0;
		LEVEL 1 FOR 6079.5;
		NODE
		{
			REPEAT = 7;
			LEVEL 0 FOR 4480.0;
			LEVEL 1 FOR 5760.0;
		}
		LEVEL 0 FOR 4480.0;
		LEVEL 1 FOR 11200.5;
		NODE
		{
			REPEAT = 3;
			LEVEL 0 FOR 8960.0;
			LEVEL 1 FOR 11520.0;
		}
		LEVEL 0 FOR 8960.0;
		LEVEL 1 FOR 6079.5;
		NODE
		{
			REPEAT = 15;
			LEVEL 0 FOR 4480.0;
			LEVEL 1 FOR 5760.0;
		}
		LEVEL 0 FOR 4480.0;
		LEVEL 1 FOR 11200.5;
		NODE
		{
			REPEAT = 7;
			LEVEL 0 FOR 8960.0;
			LEVEL 1 FOR 11520.0;
		}
		LEVEL 0 FOR 8960.0;
		LEVEL 1 FOR 6079.5;
		NODE
		{
			REPEAT = 39;
			LEVEL 0 FOR 4480.0;
			LEVEL 1 FOR 5760.0;
		}
		LEVEL 0 FOR 4480.0;
		LEVEL 1 FOR 11200.5;
		NODE
		{
			REPEAT = 11;
			LEVEL 0 FOR 8960.0;
			LEVEL 1 FOR 11520.0;
		}
		LEVEL 0 FOR 8960.0;
		LEVEL 1 FOR 6079.5;
		NODE
		{
			REPEAT = 15;
			LEVEL 0 FOR 4480.0;
			LEVEL 1 FOR 5760.0;
		}
		LEVEL 0 FOR 4480.0;
		LEVEL 1 FOR 11200.5;
		NODE
		{
			REPEAT = 3;
			LEVEL 0 FOR 8960.0;
			LEVEL 1 FOR 11520.0;
		}
		LEVEL 0 FOR 8960.0;
		LEVEL 1 FOR 6079.5;
		NODE
		{
			REPEAT = 23;
			LEVEL 0 FOR 4480.0;
			LEVEL 1 FOR 5760.0;
		}
		NODE
		{
			REPEAT = 2;
			LEVEL 0 FOR 4480.0;
			LEVEL 1 FOR 11200.5;
			NODE
			{
				REPEAT = 3;
				LEVEL 0 FOR 8960.0;
				LEVEL 1 FOR 11520.0;
			}
			LEVEL 0 FOR 8960.0;
			LEVEL 1 FOR 6079.5;
			NODE
			{
				REPEAT = 7;
				LEVEL 0 FOR 4480.0;
				LEVEL 1 FOR 5760.0;
			}
		}
		LEVEL 0 FOR 4480.0;
		LEVEL 1 FOR 11200.5;
		NODE
		{
			REPEAT = 15;
			LEVEL 0 FOR 8960.0;
			LEVEL 1 FOR 11520.0;
		}
		LEVEL 0 FOR 8960.0;
		LEVEL 1 FOR 6079.5;
		NODE
		{
			REPEAT = 7;
			LEVEL 0 FOR 4480.0;
			LEVEL 1 FOR 5760.0;
		}
		LEVEL 0 FOR 4480.0;
		LEVEL 1 FOR 11200.5;
		NODE
		{
			REPEAT = 7;
			LEVEL 0 FOR 8960.0;
			LEVEL 1 FOR 11520.0;
		}
		LEVEL 0 FOR 8960.0;
		LEVEL 1 FOR 6079.5;
		NODE
		{
			REPEAT = 7;
			LEVEL 0 FOR 4480.0;
			LEVEL 1 FOR 5760.0;
		}
		LEVEL 0 FOR 4480.0;
		LEVEL 1 FOR 11200.5;
		NODE
		{
			REPEAT = 3;
			LEVEL 0 FOR 8960.0;
			LEVEL 1 FOR 11520.0;
		}
		LEVEL 0 FOR 8960.0;
		LEVEL 1 FOR 6079.5;
		NODE
		{
			REPEAT = 15;
			LEVEL 0 FOR 4480.0;
			LEVEL 1 FOR 5760.0;
		}
		LEVEL 0 FOR 4480.0;
		LEVEL 1 FOR 11200.5;
		NODE
		{
			REPEAT = 7;
			LEVEL 0 FOR 8960.0;
			LEVEL 1 FOR 11520.0;
		}
		LEVEL 0 FOR 8960.0;
		LEVEL 1 FOR 6079.5;
		NODE
		{
			REPEAT = 39;
			LEVEL 0 FOR 4480.0;
			LEVEL 1 FOR 5760.0;
		}
		LEVEL 0 FOR 4480.0;
		LEVEL 1 FOR 11200.5;
		NODE
		{
			REPEAT = 11;
			LEVEL 0 FOR 8960.0;
			LEVEL 1 FOR 11520.0;
		}
		LEVEL 0 FOR 8960.0;
		LEVEL 1 FOR 6079.5;
		NODE
		{
			REPEAT = 15;
			LEVEL 0 FOR 4480.0;
			LEVEL 1 FOR 5760.0;
		}
		LEVEL 0 FOR 4480.0;
		LEVEL 1 FOR 11200.5;
		NODE
		{
			REPEAT = 3;
			LEVEL 0 FOR 8960.0;
			LEVEL 1 FOR 11520.0;
		}
		LEVEL 0 FOR 8960.0;
		LEVEL 1 FOR 6079.5;
		NODE
		{
			REPEAT = 23;
			LEVEL 0 FOR 4480.0;
			LEVEL 1 FOR 5760.0;
		}
		LEVEL 0 FOR 4480.0;
		LEVEL 1 FOR 11200.5;
		NODE
		{
			REPEAT = 3;
			LEVEL 0 FOR 8960.0;
			LEVEL 1 FOR 11520.0;
		}
		LEVEL 0 FOR 8960.0;
		LEVEL 1 FOR 6079.5;
		NODE
		{
			REPEAT = 3;
			LEVEL 0 FOR 4480.0;
			LEVEL 1 FOR 5760.0;
		}
		LEVEL 0 FOR 4480.0;
		LEVEL 1 FOR 3221.9;
	}
}

TRANSITION_LIST("fsk[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1898.7;
		NODE
		{
			REPEAT = 21;
			LEVEL 1 FOR 6400.0;
			LEVEL 0 FOR 2560.0;
			LEVEL 1 FOR 1280.0;
			LEVEL 0 FOR 6400.0;
			LEVEL 1 FOR 1280.0;
			LEVEL 0 FOR 2560.0;
		}
		LEVEL 1 FOR 6400.0;
		LEVEL 0 FOR 2560.0;
		LEVEL 1 FOR 1280.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1280.0;
		LEVEL 0 FOR 1600.0;
		NODE
		{
			REPEAT = 7;
			LEVEL 1 FOR 3200.0;
			LEVEL 0 FOR 1280.0;
			LEVEL 1 FOR 640.0;
			LEVEL 0 FOR 3200.0;
			LEVEL 1 FOR 640.0;
			LEVEL 0 FOR 1280.0;
		}
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 2240.0;
		NODE
		{
			REPEAT = 7;
			LEVEL 1 FOR 6400.0;
			LEVEL 0 FOR 2560.0;
			LEVEL 1 FOR 1280.0;
			LEVEL 0 FOR 6400.0;
			LEVEL 1 FOR 1280.0;
			LEVEL 0 FOR 2560.0;
		}
		LEVEL 1 FOR 6400.0;
		LEVEL 0 FOR 2560.0;
		LEVEL 1 FOR 1280.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1280.0;
		LEVEL 0 FOR 1600.0;
		NODE
		{
			REPEAT = 7;
			LEVEL 1 FOR 3200.0;
			LEVEL 0 FOR 1280.0;
			LEVEL 1 FOR 640.0;
			LEVEL 0 FOR 3200.0;
			LEVEL 1 FOR 640.0;
			LEVEL 0 FOR 1280.0;
		}
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 2240.0;
		NODE
		{
			REPEAT = 3;
			LEVEL 1 FOR 6400.0;
			LEVEL 0 FOR 2560.0;
			LEVEL 1 FOR 1280.0;
			LEVEL 0 FOR 6400.0;
12 3 4 5 下一页
💿 文件大小 660 K
👤 上传用户 z147028571a
📂 所属分类 VHDL/FPGA/Verilog
🏷️ 相关标签

#verilog #fsk #全数字 #调制解调
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