or1200.cr.mti

来自「开源软核处理器OpenRisc的SOPC设计」· MTI 代码 · 共 364 行 · 第 1/2 页

../../../rtl/verilog/or1200_spram_64x22.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_spram_64x22.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_spram_64x22

Top level modules:
	or1200_spram_64x22

} {} {}} ../../../rtl/verilog/or1200_sb_fifo.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_sb_fifo.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_sb_fifo

Top level modules:
	or1200_sb_fifo

} {} {}} ../../../rtl/verilog/or1200_tt.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_tt.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_tt

Top level modules:
	or1200_tt

} {} {}} ../../../rtl/verilog/or1200_du.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_du.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_du

Top level modules:
	or1200_du

} {} {}} ../../../rtl/verilog/or1200_wbmux.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_wbmux.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_wbmux

Top level modules:
	or1200_wbmux

} {} {}} ../../../rtl/verilog/or1200_lsu.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_lsu.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_lsu

Top level modules:
	or1200_lsu

} {} {}} ../../../rtl/verilog/or1200_dc_fsm.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_dc_fsm.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_dc_fsm

Top level modules:
	or1200_dc_fsm

} {} {}} ../../../rtl/verilog/or1200_dpram_32x32.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_dpram_32x32.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_dpram_32x32

Top level modules:
	or1200_dpram_32x32

} {} {}} ../../../rtl/verilog/or1200_dmmu_top.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_dmmu_top.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_dmmu_top

Top level modules:
	or1200_dmmu_top

} {} {}} ../../../rtl/verilog/or1200_amultp2_32x32.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_amultp2_32x32.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005

} {} {}} ../../../rtl/verilog/or1200_mem2reg.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_mem2reg.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_mem2reg

Top level modules:
	or1200_mem2reg

} {} {}} ../../../rtl/verilog/or1200_ic_tag.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_ic_tag.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_ic_tag

Top level modules:
	or1200_ic_tag

} {} {}} ../../../rtl/verilog/or1200_xcv_ram32x8d.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_xcv_ram32x8d.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005

} {} {}} ../../../rtl/verilog/or1200_spram_64x14.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_spram_64x14.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_spram_64x14

Top level modules:
	or1200_spram_64x14

} {} {}} ../../../rtl/verilog/or1200_operandmuxes.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_operandmuxes.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_operandmuxes

Top level modules:
	or1200_operandmuxes

} {} {}} ../../../rtl/verilog/or1200_dmmu_tlb.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_dmmu_tlb.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_dmmu_tlb

Top level modules:
	or1200_dmmu_tlb

} {} {}} ../../../rtl/verilog/or1200_dc_ram.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_dc_ram.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_dc_ram

Top level modules:
	or1200_dc_ram

} {} {}} ../../../rtl/verilog/or1200_cpu.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_cpu.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_cpu

Top level modules:
	or1200_cpu

} {} {}} ../../../rtl/verilog/or1200_freeze.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_freeze.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_freeze

Top level modules:
	or1200_freeze

} {} {}} ../../../rtl/verilog/or1200_mult_mac.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_mult_mac.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_mult_mac

Top level modules:
	or1200_mult_mac

} {} {}} ../../../rtl/verilog/or1200_top.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_top.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_top

Top level modules:
	or1200_top

} {} {}} ../../../rtl/verilog/timescale.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/timescale.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005

} {} {}} ../../../rtl/verilog/or1200_spram_512x20.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_spram_512x20.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_spram_512x20

Top level modules:
	or1200_spram_512x20

} {} {}} ../../../rtl/verilog/or1200_tpram_32x32.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_tpram_32x32.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_tpram_32x32

Top level modules:
	or1200_tpram_32x32

} {} {}} ../../../rtl/verilog/or1200_ctrl.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_ctrl.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_ctrl

Top level modules:
	or1200_ctrl

} {} {}} ../../../rtl/verilog/or1200_spram_1024x32.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_spram_1024x32.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_spram_1024x32

Top level modules:
	or1200_spram_1024x32

} {} {}} ../../../rtl/verilog/or1200_wb_biu.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_wb_biu.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_wb_biu

Top level modules:
	or1200_wb_biu

} {} {}} ../../../rtl/verilog/or1200_sprs.v {1 {vlog -work work +incdir+../../../rtl/verilog +incdir+../../../bench/verilog ../../../rtl/verilog/or1200_sprs.v
Model Technology ModelSim SE vlog 6.0c Compiler 2005.02 Feb  2 2005
-- Compiling module or1200_sprs

Top level modules: