run.mti

opencore ahb to wishbone bus verilog code

#! /bin/env bash

vlog ../bench/ahb2wb_tb.v
vsim -novopt -c work.ahb2wb_tb -do "log -r /*; run -all; quit -f" 2>&1 | tee transcript.log
echo "Converting to vcd ..."
wlf2vcd vsim.wlf > vsim.vcd
gtkwave vsim.vcd &