📄 count10_8.fit
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-- MAX+plus II Compiler Fit File
-- Version 10.2 07/10/2002
-- Compiled: 12/10/2008 20:46:04
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "count10_8"
BEGIN
DEVICE = "EPF10K10LC84-3";
"CLK" : INPUT_PIN = 1 ;
"CLR" : INPUT_PIN = 2 ;
"ENA" : INPUT_PIN = 42 ;
"CARRY_OUT" : OUTPUT_PIN = 81 ;
"Q0" : OUTPUT_PIN = 30 ;
"Q1" : OUTPUT_PIN = 28 ;
"Q2" : OUTPUT_PIN = 67 ;
"Q3" : OUTPUT_PIN = 37 ;
"Q4" : OUTPUT_PIN = 21 ;
"Q5" : OUTPUT_PIN = 66 ;
"Q6" : OUTPUT_PIN = 25 ;
"Q7" : OUTPUT_PIN = 64 ;
"Q8" : OUTPUT_PIN = 7 ;
"Q9" : OUTPUT_PIN = 8 ;
"Q10" : OUTPUT_PIN = 6 ;
"Q11" : OUTPUT_PIN = 29 ;
"Q12" : OUTPUT_PIN = 24 ;
"Q13" : OUTPUT_PIN = 23 ;
"Q14" : OUTPUT_PIN = 65 ;
"Q15" : OUTPUT_PIN = 35 ;
"Q16" : OUTPUT_PIN = 59 ;
"Q17" : OUTPUT_PIN = 58 ;
"Q18" : OUTPUT_PIN = 62 ;
"Q19" : OUTPUT_PIN = 60 ;
"Q20" : OUTPUT_PIN = 17 ;
"Q21" : OUTPUT_PIN = 18 ;
"Q22" : OUTPUT_PIN = 73 ;
"Q23" : OUTPUT_PIN = 83 ;
"Q24" : OUTPUT_PIN = 52 ;
"Q25" : OUTPUT_PIN = 53 ;
"Q26" : OUTPUT_PIN = 70 ;
"Q27" : OUTPUT_PIN = 71 ;
"Q28" : OUTPUT_PIN = 19 ;
"Q29" : OUTPUT_PIN = 72 ;
"Q30" : OUTPUT_PIN = 69 ;
"Q31" : OUTPUT_PIN = 54 ;
"CLR~1" : LOCATION = LC1_B13;
"|CNT10:U|LPM_ADD_SUB:79|addcore:adder|:59" : LOCATION = LC8_B10;
"|CNT10:U|LPM_ADD_SUB:79|addcore:adder|:68" : LOCATION = LC7_B10;
"|CNT10:U|:9" : LOCATION = LC4_B10; -- |CNT10:U|cqi3
"|CNT10:U|:10" : LOCATION = LC1_B10; -- |CNT10:U|cqi2
"|CNT10:U|:11" : LOCATION = LC2_B10; -- |CNT10:U|cqi1
"|CNT10:U|:12" : LOCATION = LC6_B10; -- |CNT10:U|cqi0
"|CNT10:U|:13" : LOCATION = LC2_B1 ; -- |CNT10:U|C_sig
"|CNT10:U|:52" : LOCATION = LC5_B10;
"|CNT10:U~56|LPM_ADD_SUB:79|addcore:adder|:59" : LOCATION = LC5_B1 ;
"|CNT10:U~56|LPM_ADD_SUB:79|addcore:adder|:68" : LOCATION = LC4_B1 ;
"|CNT10:U~56|:9" : LOCATION = LC7_B1 ; -- |CNT10:U~56|cqi3
"|CNT10:U~56|:10" : LOCATION = LC8_B1 ; -- |CNT10:U~56|cqi2
"|CNT10:U~56|:11" : LOCATION = LC3_B1 ; -- |CNT10:U~56|cqi1
"|CNT10:U~56|:12" : LOCATION = LC1_B1 ; -- |CNT10:U~56|cqi0
"|CNT10:U~56|:13" : LOCATION = LC2_B3 ; -- |CNT10:U~56|C_sig
"|CNT10:U~56|:52" : LOCATION = LC6_B1 ;
"|CNT10:U~80|LPM_ADD_SUB:79|addcore:adder|:59" : LOCATION = LC8_B3 ;
"|CNT10:U~80|LPM_ADD_SUB:79|addcore:adder|:68" : LOCATION = LC3_B3 ;
"|CNT10:U~80|:9" : LOCATION = LC5_B3 ; -- |CNT10:U~80|cqi3
"|CNT10:U~80|:10" : LOCATION = LC6_B3 ; -- |CNT10:U~80|cqi2
"|CNT10:U~80|:11" : LOCATION = LC7_B3 ; -- |CNT10:U~80|cqi1
"|CNT10:U~80|:12" : LOCATION = LC1_B3 ; -- |CNT10:U~80|cqi0
"|CNT10:U~80|:13" : LOCATION = LC7_B5 ; -- |CNT10:U~80|C_sig
"|CNT10:U~80|:52" : LOCATION = LC4_B3 ;
"|CNT10:U~97|LPM_ADD_SUB:79|addcore:adder|:59" : LOCATION = LC8_B5 ;
"|CNT10:U~97|LPM_ADD_SUB:79|addcore:adder|:68" : LOCATION = LC2_B5 ;
"|CNT10:U~97|:9" : LOCATION = LC1_B5 ; -- |CNT10:U~97|cqi3
"|CNT10:U~97|:10" : LOCATION = LC5_B5 ; -- |CNT10:U~97|cqi2
"|CNT10:U~97|:11" : LOCATION = LC4_B5 ; -- |CNT10:U~97|cqi1
"|CNT10:U~97|:12" : LOCATION = LC6_B5 ; -- |CNT10:U~97|cqi0
"|CNT10:U~97|:13" : LOCATION = LC3_B10; -- |CNT10:U~97|C_sig
"|CNT10:U~97|:52" : LOCATION = LC3_B5 ;
"|CNT10:U~114|LPM_ADD_SUB:79|addcore:adder|:59" : LOCATION = LC8_C17;
"|CNT10:U~114|LPM_ADD_SUB:79|addcore:adder|:68" : LOCATION = LC6_C17;
"|CNT10:U~114|:9" : LOCATION = LC4_C17; -- |CNT10:U~114|cqi3
"|CNT10:U~114|:10" : LOCATION = LC1_C17; -- |CNT10:U~114|cqi2
"|CNT10:U~114|:11" : LOCATION = LC7_C17; -- |CNT10:U~114|cqi1
"|CNT10:U~114|:12" : LOCATION = LC5_C17; -- |CNT10:U~114|cqi0
"|CNT10:U~114|:13" : LOCATION = LC3_C17; -- |CNT10:U~114|C_sig
"|CNT10:U~114|:52" : LOCATION = LC2_C17;
"|CNT10:U~131|LPM_ADD_SUB:79|addcore:adder|:59" : LOCATION = LC8_A14;
"|CNT10:U~131|LPM_ADD_SUB:79|addcore:adder|:68" : LOCATION = LC7_A14;
"|CNT10:U~131|:9" : LOCATION = LC6_A14; -- |CNT10:U~131|cqi3
"|CNT10:U~131|:10" : LOCATION = LC1_A14; -- |CNT10:U~131|cqi2
"|CNT10:U~131|:11" : LOCATION = LC5_A14; -- |CNT10:U~131|cqi1
"|CNT10:U~131|:12" : LOCATION = LC2_A14; -- |CNT10:U~131|cqi0
"|CNT10:U~131|:13" : LOCATION = LC3_A14; -- |CNT10:U~131|C_sig
"|CNT10:U~131|:52" : LOCATION = LC4_A14;
"|CNT10:U~148|LPM_ADD_SUB:79|addcore:adder|:59" : LOCATION = LC8_A19;
"|CNT10:U~148|LPM_ADD_SUB:79|addcore:adder|:68" : LOCATION = LC7_A19;
"|CNT10:U~148|:9" : LOCATION = LC4_A19; -- |CNT10:U~148|cqi3
"|CNT10:U~148|:10" : LOCATION = LC5_A19; -- |CNT10:U~148|cqi2
"|CNT10:U~148|:11" : LOCATION = LC6_A19; -- |CNT10:U~148|cqi1
"|CNT10:U~148|:12" : LOCATION = LC1_A19; -- |CNT10:U~148|cqi0
"|CNT10:U~148|:13" : LOCATION = LC2_A19; -- |CNT10:U~148|C_sig
"|CNT10:U~148|:52" : LOCATION = LC3_A19;
"|CNT10:U~165|LPM_ADD_SUB:79|addcore:adder|:59" : LOCATION = LC6_A21;
"|CNT10:U~165|LPM_ADD_SUB:79|addcore:adder|:68" : LOCATION = LC4_A21;
"|CNT10:U~165|:9" : LOCATION = LC1_A21; -- |CNT10:U~165|cqi3
"|CNT10:U~165|:10" : LOCATION = LC8_A21; -- |CNT10:U~165|cqi2
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