📄 reg32b.rpt
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-- Node name is 'DOUT18'
-- Equation name is 'DOUT18', type is output
DOUT18 = REG3218;
-- Node name is 'DOUT19'
-- Equation name is 'DOUT19', type is output
DOUT19 = REG3219;
-- Node name is 'DOUT20'
-- Equation name is 'DOUT20', type is output
DOUT20 = REG3220;
-- Node name is 'DOUT21'
-- Equation name is 'DOUT21', type is output
DOUT21 = REG3221;
-- Node name is 'DOUT22'
-- Equation name is 'DOUT22', type is output
DOUT22 = REG3222;
-- Node name is 'DOUT23'
-- Equation name is 'DOUT23', type is output
DOUT23 = REG3223;
-- Node name is 'DOUT24'
-- Equation name is 'DOUT24', type is output
DOUT24 = REG3224;
-- Node name is 'DOUT25'
-- Equation name is 'DOUT25', type is output
DOUT25 = REG3225;
-- Node name is 'DOUT26'
-- Equation name is 'DOUT26', type is output
DOUT26 = REG3226;
-- Node name is 'DOUT27'
-- Equation name is 'DOUT27', type is output
DOUT27 = REG3227;
-- Node name is 'DOUT28'
-- Equation name is 'DOUT28', type is output
DOUT28 = REG3228;
-- Node name is 'DOUT29'
-- Equation name is 'DOUT29', type is output
DOUT29 = REG3229;
-- Node name is 'DOUT30'
-- Equation name is 'DOUT30', type is output
DOUT30 = REG3230;
-- Node name is 'DOUT31'
-- Equation name is 'DOUT31', type is output
DOUT31 = REG3231;
-- Node name is ':97' = 'REG320'
-- Equation name is 'REG320', location is LC1_A22, type is buried.
REG320 = DFFE( DIN0, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':96' = 'REG321'
-- Equation name is 'REG321', location is LC4_A3, type is buried.
REG321 = DFFE( DIN1, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':95' = 'REG322'
-- Equation name is 'REG322', location is LC5_B17, type is buried.
REG322 = DFFE( DIN2, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':94' = 'REG323'
-- Equation name is 'REG323', location is LC8_B6, type is buried.
REG323 = DFFE( DIN3, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':93' = 'REG324'
-- Equation name is 'REG324', location is LC2_B2, type is buried.
REG324 = DFFE( DIN4, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':92' = 'REG325'
-- Equation name is 'REG325', location is LC7_A19, type is buried.
REG325 = DFFE( DIN5, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':91' = 'REG326'
-- Equation name is 'REG326', location is LC7_C22, type is buried.
REG326 = DFFE( DIN6, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':90' = 'REG327'
-- Equation name is 'REG327', location is LC5_C19, type is buried.
REG327 = DFFE( DIN7, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':89' = 'REG328'
-- Equation name is 'REG328', location is LC5_C3, type is buried.
REG328 = DFFE( DIN8, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':88' = 'REG329'
-- Equation name is 'REG329', location is LC2_C17, type is buried.
REG329 = DFFE( DIN9, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':87' = 'REG3210'
-- Equation name is 'REG3210', location is LC4_B17, type is buried.
REG3210 = DFFE( DIN10, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':86' = 'REG3211'
-- Equation name is 'REG3211', location is LC4_B6, type is buried.
REG3211 = DFFE( DIN11, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':85' = 'REG3212'
-- Equation name is 'REG3212', location is LC1_C18, type is buried.
REG3212 = DFFE( DIN12, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':84' = 'REG3213'
-- Equation name is 'REG3213', location is LC1_A21, type is buried.
REG3213 = DFFE( DIN13, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':83' = 'REG3214'
-- Equation name is 'REG3214', location is LC2_C6, type is buried.
REG3214 = DFFE( DIN14, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':82' = 'REG3215'
-- Equation name is 'REG3215', location is LC8_A4, type is buried.
REG3215 = DFFE( DIN15, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':81' = 'REG3216'
-- Equation name is 'REG3216', location is LC4_C19, type is buried.
REG3216 = DFFE( DIN16, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':80' = 'REG3217'
-- Equation name is 'REG3217', location is LC1_B18, type is buried.
REG3217 = DFFE( DIN17, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':79' = 'REG3218'
-- Equation name is 'REG3218', location is LC2_B4, type is buried.
REG3218 = DFFE( DIN18, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':78' = 'REG3219'
-- Equation name is 'REG3219', location is LC6_B7, type is buried.
REG3219 = DFFE( DIN19, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':77' = 'REG3220'
-- Equation name is 'REG3220', location is LC4_A9, type is buried.
REG3220 = DFFE( DIN20, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':76' = 'REG3221'
-- Equation name is 'REG3221', location is LC2_A3, type is buried.
REG3221 = DFFE( DIN21, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':75' = 'REG3222'
-- Equation name is 'REG3222', location is LC5_B5, type is buried.
REG3222 = DFFE( DIN22, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':74' = 'REG3223'
-- Equation name is 'REG3223', location is LC2_A6, type is buried.
REG3223 = DFFE( DIN23, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':73' = 'REG3224'
-- Equation name is 'REG3224', location is LC3_C21, type is buried.
REG3224 = DFFE( DIN24, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':72' = 'REG3225'
-- Equation name is 'REG3225', location is LC7_B15, type is buried.
REG3225 = DFFE( DIN25, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':71' = 'REG3226'
-- Equation name is 'REG3226', location is LC5_A13, type is buried.
REG3226 = DFFE( DIN26, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':70' = 'REG3227'
-- Equation name is 'REG3227', location is LC1_B3, type is buried.
REG3227 = DFFE( DIN27, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':69' = 'REG3228'
-- Equation name is 'REG3228', location is LC2_C19, type is buried.
REG3228 = DFFE( DIN28, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':68' = 'REG3229'
-- Equation name is 'REG3229', location is LC4_A17, type is buried.
REG3229 = DFFE( DIN29, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':67' = 'REG3230'
-- Equation name is 'REG3230', location is LC5_A11, type is buried.
REG3230 = DFFE( DIN30, GLOBAL( LOAD), VCC, VCC, VCC);
-- Node name is ':66' = 'REG3231'
-- Equation name is 'REG3231', location is LC1_C7, type is buried.
REG3231 = DFFE( DIN31, GLOBAL( LOAD), VCC, VCC, VCC);
Project Information f:\eda38\k4\plj\reg32b.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Multi-Level
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'FLEX10K' family
CARRY_CHAIN = ignore
CARRY_CHAIN_LENGTH = 32
CASCADE_CHAIN = ignore
CASCADE_CHAIN_LENGTH = 2
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SUBFACTOR_EXTRACTION = on
IGNORE_SOFT_BUFFERS = on
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Automatic Global Output Enable = on
Automatic Fast I/O = off
Automatic Register Packing = off
Automatic Open-Drain Pins = on
Automatic Implement in EAB = off
Optimize = 5
Default Timing Specifications: None
Cut All Bidir Feedback Timing Paths = on
Cut All Clear & Preset Timing Paths = on
Ignore Timing Assignments = on
Functional SNF Extractor = off
Linked SNF Extractor = off
Timing SNF Extractor = on
Optimize Timing SNF = off
Generate AHDL TDO File = off
Fitter Settings = NORMAL
Use Quartus Fitter = on
Smart Recompile = off
Total Recompile = off
Interfaces Menu Commands
------------------------
EDIF Netlist Writer = off
Verilog Netlist Writer = off
VHDL Netlist Writer = off
Compilation Times
-----------------
Compiler Netlist Extractor 00:00:00
Database Builder 00:00:00
Logic Synthesizer 00:00:00
Partitioner 00:00:00
Fitter 00:00:01
Timing SNF Extractor 00:00:00
Assembler 00:00:00
-------------------------- --------
Total Time 00:00:01
Memory Allocated
-----------------
Peak memory allocated during compilation = 12,113K
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