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📄 display.rpt

📁 数字频率计是一种用来测试周期性变化信号工作频率的装置。其原理是在规定的单位时间(闸门时间)内
💻 RPT
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字号:
   -      6     -    C    15       AND2                0    4    0    1  :884
   -      4     -    C    17        OR2        !       0    4    0    1  :889
   -      2     -    C    17       AND2                0    4    0    1  :894
   -      5     -    C    17       AND2                0    4    0    1  :899
   -      5     -    C    21        OR2        !       0    4    0    1  :904
   -      8     -    C    21        OR2        !       0    4    0    1  :919
   -      7     -    C    15        OR2    s           0    2    0    1  ~1036~1
   -      3     -    C    21        OR2                0    4    1    0  :1050
   -      4     -    C    21       AND2    s           0    3    0    1  ~1075~1
   -      1     -    C    21        OR2                0    4    1    0  :1099
   -      3     -    C    17        OR2                0    4    1    0  :1150
   -      6     -    C    21        OR2                0    4    0    1  :1168
   -      2     -    C    21        OR2                0    4    0    1  :1185
   -      1     -    C    17        OR2                0    4    0    1  :1194
   -      4     -    C    15        OR2                0    4    1    0  :1201
   -      1     -    C    15        OR2                0    4    1    0  :1252
   -      5     -    C    15        OR2                0    4    1    0  :1303
   -      7     -    C    21        OR2                0    4    1    0  :1354


Code:

s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register


Device-Specific Information:                       f:\eda38\k4\plj\display.rpt
display

** FASTTRACK INTERCONNECT UTILIZATION **

Row FastTrack Interconnect:

          Global         Left Half-      Right Half-
         FastTrack       FastTrack       FastTrack 
Row     Interconnect    Interconnect    Interconnect    Input Pins     Output Pins     Bidir Pins
A:       0/ 96(  0%)     0/ 48(  0%)     2/ 48(  4%)    0/16(  0%)      2/16( 12%)     0/16(  0%)
B:      18/ 96( 18%)     0/ 48(  0%)    25/ 48( 52%)    8/16( 50%)      1/16(  6%)     0/16(  0%)
C:       3/ 96(  3%)     0/ 48(  0%)    10/ 48( 20%)    0/16(  0%)      7/16( 43%)     0/16(  0%)


Column FastTrack Interconnect:

         FastTrack                                 
Column  Interconnect    Input Pins     Output Pins     Bidir Pins
01:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
02:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
03:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
04:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
05:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
06:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
07:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
08:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
09:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
10:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
11:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
12:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
13:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
14:      3/24( 12%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
15:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
16:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
17:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
18:      2/24(  8%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
19:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
20:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
21:      2/24(  8%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
22:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
23:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
24:      4/24( 16%)     2/4( 50%)      0/4(  0%)       0/4(  0%)
EA:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)


Device-Specific Information:                       f:\eda38\k4\plj\display.rpt
display

** CLOCK SIGNALS **

Type     Fan-out       Name
INPUT       13         disclk


Device-Specific Information:                       f:\eda38\k4\plj\display.rpt
display

** EQUATIONS **

disclk   : INPUT;
num10    : INPUT;
num11    : INPUT;
num12    : INPUT;
num13    : INPUT;
num20    : INPUT;
num21    : INPUT;
num22    : INPUT;
num23    : INPUT;
num30    : INPUT;
num31    : INPUT;
num32    : INPUT;
num33    : INPUT;
num40    : INPUT;
num41    : INPUT;
num42    : INPUT;
num43    : INPUT;
num50    : INPUT;
num51    : INPUT;
num52    : INPUT;
num53    : INPUT;
num60    : INPUT;
num61    : INPUT;
num62    : INPUT;
num63    : INPUT;
num70    : INPUT;
num71    : INPUT;
num72    : INPUT;
num73    : INPUT;
num80    : INPUT;
num81    : INPUT;
num82    : INPUT;
num83    : INPUT;

-- Node name is 'led_a' 
-- Equation name is 'led_a', type is output 
led_a    =  _LC7_C21;

-- Node name is 'led_b' 
-- Equation name is 'led_b', type is output 
led_b    =  _LC5_C15;

-- Node name is 'led_c' 
-- Equation name is 'led_c', type is output 
led_c    =  _LC1_C15;

-- Node name is 'led_d' 
-- Equation name is 'led_d', type is output 
led_d    =  _LC4_C15;

-- Node name is 'led_e' 
-- Equation name is 'led_e', type is output 
led_e    =  _LC3_C17;

-- Node name is 'led_f' 
-- Equation name is 'led_f', type is output 
led_f    =  _LC1_C21;

-- Node name is 'led_g' 
-- Equation name is 'led_g', type is output 
led_g    =  _LC3_C21;

-- Node name is 'led_sa' 
-- Equation name is 'led_sa', type is output 
led_sa   =  sel0;

-- Node name is 'led_sb' 
-- Equation name is 'led_sb', type is output 
led_sb   =  sel1;

-- Node name is 'led_sc' 
-- Equation name is 'led_sc', type is output 
led_sc   =  sel2;

-- Node name is ':56' = 'num0' 
-- Equation name is 'num0', location is LC2_B24, type is buried.
num0     = DFFE( _EQ001, GLOBAL( disclk),  VCC,  VCC,  VCC);
  _EQ001 = !_LC7_B20 &  _LC8_B24
         #  _LC7_B20 &  num10;

-- Node name is ':55' = 'num1~115' 
-- Equation name is 'num1~115', location is LC1_B18, type is buried.
num1~115 = DFFE( _EQ002, GLOBAL( disclk),  VCC,  VCC,  VCC);
  _EQ002 =  _LC4_B18 & !_LC7_B20
         #  _LC7_B20 &  num11;

-- Node name is ':54' = 'num2~115' 
-- Equation name is 'num2~115', location is LC2_B21, type is buried.
num2~115 = DFFE( _EQ003, GLOBAL( disclk),  VCC,  VCC,  VCC);
  _EQ003 = !_LC7_B20 &  _LC7_B21
         #  _LC7_B20 &  num12;

-- Node name is ':53' = 'num3~115' 
-- Equation name is 'num3~115', location is LC1_B14, type is buried.
num3~115 = DFFE( _EQ004, GLOBAL( disclk),  VCC,  VCC,  VCC);
  _EQ004 = !_LC7_B20 &  _LC8_B14
         #  _LC7_B20 &  num13;

-- Node name is ':49' = 'q0' 
-- Equation name is 'q0', location is LC3_B19, type is buried.
q0       = DFFE(!q0, GLOBAL( disclk),  VCC,  VCC,  VCC);

-- Node name is ':48' = 'q1' 
-- Equation name is 'q1', location is LC4_B19, type is buried.
q1       = DFFE( _EQ005, GLOBAL( disclk),  VCC,  VCC,  VCC);
  _EQ005 = !_LC5_B20 &  q0 & !q1
         # !_LC5_B20 & !q0 &  q1;

-- Node name is ':47' = 'q2' 
-- Equation name is 'q2', location is LC2_B19, type is buried.
q2       = DFFE( _EQ006, GLOBAL( disclk),  VCC,  VCC,  VCC);
  _EQ006 = !_LC5_B20 & !q0 &  q2
         # !_LC5_B20 & !q1 &  q2
         # !_LC5_B20 &  q0 &  q1 & !q2;

-- Node name is ':46' = 'q3' 
-- Equation name is 'q3', location is LC8_B20, type is buried.
q3       = DFFE( _EQ007, GLOBAL( disclk),  VCC,  VCC,  VCC);
  _EQ007 = !_LC1_B19 & !_LC5_B20 &  q3
         #  _LC1_B19 & !_LC5_B20 & !q3;

-- Node name is ':45' = 'q4' 
-- Equation name is 'q4', location is LC2_B20, type is buried.
q4       = DFFE( _EQ008, GLOBAL( disclk),  VCC,  VCC,  VCC);
  _EQ008 = !q3 &  q4
         # !_LC1_B19 &  q4
         #  _LC1_B19 &  q3 & !q4;

-- Node name is ':44' = 'q5' 
-- Equation name is 'q5', location is LC1_B20, type is buried.
q5       = DFFE( _EQ009, GLOBAL( disclk),  VCC,  VCC,  VCC);
  _EQ009 = !q3 &  q5
         # !_LC1_B19 &  q5
         # !q4 &  q5
         #  _LC1_B19 &  q3 &  q4 & !q5;

-- Node name is ':59' = 'sel0' 
-- Equation name is 'sel0', location is LC1_B22, type is buried.
sel0     = DFFE( q3, GLOBAL( disclk),  VCC,  VCC,  VCC);

-- Node name is ':58' = 'sel1' 
-- Equation name is 'sel1', location is LC1_B24, type is buried.
sel1     = DFFE( q4, GLOBAL( disclk),  VCC,  VCC,  VCC);

-- Node name is ':57' = 'sel2' 
-- Equation name is 'sel2', location is LC4_B14, type is buried.
sel2     = DFFE( _EQ010, GLOBAL( disclk),  VCC,  VCC,  VCC);
  _EQ010 = !_LC3_B24 & !_LC6_B24 & !_LC7_B20 & !_LC7_B24;

-- Node name is '|LPM_ADD_SUB:129|addcore:adder|:67' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC1_B19', type is buried 
!_LC1_B19 = _LC1_B19~NOT;
_LC1_B19~NOT = LCELL( _EQ011);
  _EQ011 = !q2
         # !q0
         # !q1;

-- Node name is ':92' 
-- Equation name is '_LC5_B20', type is buried 
!_LC5_B20 = _LC5_B20~NOT;
_LC5_B20~NOT = LCELL( _EQ012);
  _EQ012 = !q5
         # !q4
         # !q3
         # !_LC1_B19;

-- Node name is ':331' 
-- Equation name is '_LC7_B20', type is buried 
!_LC7_B20 = _LC7_B20~NOT;
_LC7_B20~NOT = LCELL( _EQ013);
  _EQ013 =  q4
         #  q3
         #  q5;

-- Node name is ':338' 
-- Equation name is '_LC7_B24', type is buried 
!_LC7_B24 = _LC7_B24~NOT;
_LC7_B24~NOT = LCELL( _EQ014);
  _EQ014 =  q4
         # !q3
         #  q5;

-- Node name is ':345' 
-- Equation name is '_LC6_B24', type is buried 
!_LC6_B24 = _LC6_B24~NOT;
_LC6_B24~NOT = LCELL( _EQ015);
  _EQ015 = !q4
         #  q3
         #  q5;

-- Node name is ':352' 
-- Equation name is '_LC3_B24', type is buried 
!_LC3_B24 = _LC3_B24~NOT;
_LC3_B24~NOT = LCELL( _EQ016);
  _EQ016 = !q4
         # !q3
         #  q5;

-- Node name is ':359' 
-- Equation name is '_LC4_B20', type is buried 
_LC4_B20 = LCELL( _EQ017);
  _EQ017 = !q3 & !q4 &  q5;

-- Node name is ':366' 
-- Equation name is '_LC3_B20', type is buried 
_LC3_B20 = LCELL( _EQ018);
  _EQ018 =  q3 & !q4 &  q5;

-- Node name is ':373' 
-- Equation name is '_LC6_B20', type is buried 
_LC6_B20 = LCELL( _EQ019);
  _EQ019 = !q3 &  q4 &  q5;

-- Node name is ':562' 
-- Equation name is '_LC2_B14', type is buried 
_LC2_B14 = LCELL( _EQ020);
  _EQ020 = !_LC6_B20 &  num83
         #  _LC6_B20 &  num73;

-- Node name is ':568' 
-- Equation name is '_LC3_B14', type is buried 
_LC3_B14 = LCELL( _EQ021);
  _EQ021 =  _LC2_B14 & !_LC3_B20
         #  _LC3_B20 &  num63;

-- Node name is ':574' 
-- Equation name is '_LC5_B14', type is buried 
_LC5_B14 = LCELL( _EQ022);
  _EQ022 =  _LC3_B14 & !_LC4_B20
         #  _LC4_B20 &  num53;

-- Node name is ':580' 
-- Equation name is '_LC6_B14', type is buried 
_LC6_B14 = LCELL( _EQ023);
  _EQ023 = !_LC3_B24 &  _LC5_B14
         #  _LC3_B24 &  num43;

-- Node name is ':586' 
-- Equation name is '_LC7_B14', type is buried 
_LC7_B14 = LCELL( _EQ024);
  _EQ024 =  _LC6_B14 & !_LC6_B24
         #  _LC6_B24 &  num33;

-- Node name is ':592' 
-- Equation name is '_LC8_B14', type is buried 
_LC8_B14 = LCELL( _EQ025);
  _EQ025 =  _LC7_B14 & !_LC7_B24
         #  _LC7_B24 &  num23;

-- Node name is ':604' 
-- Equation name is '_LC1_B21', type is buried 
_LC1_B21 = LCELL( _EQ026);
  _EQ026 = !_LC6_B20 &  num82
         #  _LC6_B20 &  num72;

-- Node name is ':607' 
-- Equation name is '_LC3_B21', type is buried 
_LC3_B21 = LCELL( _EQ027);
  _EQ027 =  _LC1_B21 & !_LC3_B20
         #  _LC3_B20 &  num62;

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