lib.dls

数字频率计是一种用来测试周期性变化信号工作频率的装置。其原理是在规定的单位时间（闸门时间）内

DLSL
1
CNT10.VHDLVIEW U9732403.DLS
CNT10-ONE.SYNTHESISVIEW U4254935.DLS
CNT10-ONE.VHDLVIEW U8423991.DLS
COUNT10_8.VHDLVIEW U6474678.DLS
COUNT10_8-ART1.SYNTHESISVIEW U9201053.DLS
COUNT10_8-ART1.VHDLVIEW U4225414.DLS
DISPLAY.VHDLVIEW U4910123.DLS
DISPLAY-BEHAV.SYNTHESISVIEW U0104555.DLS
DISPLAY-BEHAV.VHDLVIEW U8790886.DLS
EBIT_TEN_COUNTER.VHDLVIEW U6719736.DLS
EBIT_TEN_COUNTER-A.SYNTHESISVIEW U8712444.DLS
EBIT_TEN_COUNTER-A.VHDLVIEW U3705481.DLS
REG32B.VHDLVIEW U6764505.DLS
REG32B-ART.SYNTHESISVIEW U6909261.DLS
REG32B-ART.VHDLVIEW U3881266.DLS
TEN_COUNTER.VHDLVIEW U3325265.DLS
TEN_COUNTER-RT2.SYNTHESISVIEW U2420420.DLS
TEN_COUNTER-RT2.VHDLVIEW U5527193.DLS
TESTCTL.VHDLVIEW U9579325.DLS
TESTCTL-BEHAVE.SYNTHESISVIEW U7176920.DLS
TESTCTL-BEHAVE.VHDLVIEW U2407885.DLS