hanshu.map.eqn

用FPGA做的DDS函数信号发生器

--MB1L20 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[594]~43065
MB1L20 = MC1L47 & MC1L37 # !MC1L47 & (GB1L39);


--MB1L19 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[593]~43066
MB1L19 = MC1L47 & MC1L35 # !MC1L47 & (GB1L37);


--MB1L18 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[592]~43067
MB1L18 = MC1L47 & MC1L33 # !MC1L47 & (GB1L35);


--MB1L17 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[591]~43068
MB1L17 = MC1L47 & MC1L31 # !MC1L47 & (GB1L33);


--MB1L16 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[590]~43069
MB1L16 = MC1L47 & MC1L29 # !MC1L47 & (GB1L31);


--MB1L15 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[589]~43070
MB1L15 = MC1L47 & MC1L27 # !MC1L47 & (GB1L29);


--MB1L14 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[588]~43071
MB1L14 = MC1L47 & MC1L25 # !MC1L47 & (GB1L27);


--MB1L13 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[587]~43072
MB1L13 = MC1L47 & MC1L23 # !MC1L47 & (GB1L25);


--MB1L12 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[586]~43073
MB1L12 = MC1L47 & MC1L21 # !MC1L47 & (GB1L23);


--MB1L11 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[585]~43074
MB1L11 = MC1L47 & MC1L19 # !MC1L47 & (GB1L21);


--MB1L10 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[584]~43075
MB1L10 = MC1L47 & MC1L17 # !MC1L47 & (GB1L19);


--MB1L9 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[583]~43076
MB1L9 = MC1L47 & MC1L15 # !MC1L47 & (GB1L17);


--MB1L8 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[582]~43077
MB1L8 = MC1L47 & MC1L13 # !MC1L47 & (GB1L15);


--MB1L7 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[581]~43078
MB1L7 = MC1L47 & MC1L11 # !MC1L47 & (GB1L13);


--MB1L6 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[580]~43079
MB1L6 = MC1L47 & MC1L9 # !MC1L47 & (GB1L11);


--MB1L5 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[579]~43080
MB1L5 = MC1L47 & MC1L7 # !MC1L47 & (GB1L9);


--MB1L4 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[578]~43081
MB1L4 = MC1L47 & MC1L5 # !MC1L47 & (GB1L7);


--MB1L3 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[577]~43082
MB1L3 = MC1L47 & MC1L3 # !MC1L47 & (GB1L5);


--MB1L2 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[576]~43083
MB1L2 = MC1L47 & MC1L1 # !MC1L47 & (GB1L3);


--MB1L1 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|StageOut[575]~43084
MB1L1 = MC1L47 $ GB1L1;


--NC1L1 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~613
NC1L1 = MB1L1 & (FB1_w26w[17] $ VCC) # !MB1L1 & FB1_w26w[17] & VCC;

--NC1L2 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~614
NC1L2 = CARRY(MB1L1 & FB1_w26w[17]);


--NC1L3 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~615
NC1L3 = MB1L2 & !NC1L2 # !MB1L2 & (NC1L2 # GND);

--NC1L4 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~616
NC1L4 = CARRY(!NC1L2 # !MB1L2);


--NC1L5 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~617
NC1L5 = MB1L3 & (NC1L4 $ GND) # !MB1L3 & !NC1L4 & VCC;

--NC1L6 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~618
NC1L6 = CARRY(MB1L3 & !NC1L4);


--NC1L7 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~619
NC1L7 = MB1L4 & !NC1L6 # !MB1L4 & (NC1L6 # GND);

--NC1L8 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~620
NC1L8 = CARRY(!NC1L6 # !MB1L4);


--NC1L9 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~621
NC1L9 = MB1L5 & (NC1L8 $ GND) # !MB1L5 & !NC1L8 & VCC;

--NC1L10 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~622
NC1L10 = CARRY(MB1L5 & !NC1L8);


--NC1L11 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~623
NC1L11 = MB1L6 & !NC1L10 # !MB1L6 & (NC1L10 # GND);

--NC1L12 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~624
NC1L12 = CARRY(!NC1L10 # !MB1L6);


--NC1L13 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~625
NC1L13 = MB1L7 & (NC1L12 $ GND) # !MB1L7 & !NC1L12 & VCC;

--NC1L14 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~626
NC1L14 = CARRY(MB1L7 & !NC1L12);


--NC1L15 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~627
NC1L15 = MB1L8 & !NC1L14 # !MB1L8 & (NC1L14 # GND);

--NC1L16 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~628
NC1L16 = CARRY(!NC1L14 # !MB1L8);


--NC1L17 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~629
NC1L17 = MB1L9 & (NC1L16 $ GND) # !MB1L9 & !NC1L16 & VCC;

--NC1L18 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~630
NC1L18 = CARRY(MB1L9 & !NC1L16);


--NC1L19 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~631
NC1L19 = MB1L10 & !NC1L18 # !MB1L10 & (NC1L18 # GND);

--NC1L20 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~632
NC1L20 = CARRY(!NC1L18 # !MB1L10);


--NC1L21 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~633
NC1L21 = MB1L11 & (NC1L20 $ GND) # !MB1L11 & !NC1L20 & VCC;

--NC1L22 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~634
NC1L22 = CARRY(MB1L11 & !NC1L20);


--NC1L23 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~635
NC1L23 = MB1L12 & !NC1L22 # !MB1L12 & (NC1L22 # GND);

--NC1L24 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~636
NC1L24 = CARRY(!NC1L22 # !MB1L12);


--NC1L25 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~637
NC1L25 = MB1L13 & (NC1L24 $ GND) # !MB1L13 & !NC1L24 & VCC;

--NC1L26 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~638
NC1L26 = CARRY(MB1L13 & !NC1L24);


--NC1L27 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~639
NC1L27 = MB1L14 & !NC1L26 # !MB1L14 & (NC1L26 # GND);

--NC1L28 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~640
NC1L28 = CARRY(!NC1L26 # !MB1L14);


--NC1L29 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~641
NC1L29 = MB1L15 & (NC1L28 $ GND) # !MB1L15 & !NC1L28 & VCC;

--NC1L30 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~642
NC1L30 = CARRY(MB1L15 & !NC1L28);


--NC1L31 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~643
NC1L31 = MB1L16 & !NC1L30 # !MB1L16 & (NC1L30 # GND);

--NC1L32 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~644
NC1L32 = CARRY(!NC1L30 # !MB1L16);


--NC1L33 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~645
NC1L33 = MB1L17 & (NC1L32 $ GND) # !MB1L17 & !NC1L32 & VCC;

--NC1L34 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~646
NC1L34 = CARRY(MB1L17 & !NC1L32);


--NC1L35 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~647
NC1L35 = MB1L18 & !NC1L34 # !MB1L18 & (NC1L34 # GND);

--NC1L36 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~648
NC1L36 = CARRY(!NC1L34 # !MB1L18);


--NC1L37 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~649
NC1L37 = MB1L19 & (NC1L36 $ GND) # !MB1L19 & !NC1L36 & VCC;

--NC1L38 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~650
NC1L38 = CARRY(MB1L19 & !NC1L36);


--NC1L39 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~651
NC1L39 = MB1L20 & !NC1L38 # !MB1L20 & (NC1L38 # GND);

--NC1L40 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~652
NC1L40 = CARRY(!NC1L38 # !MB1L20);


--NC1L41 is lpm_divide0:inst8|lpm_divide:lpm_divide_component|lpm_divide_lej:auto_generated|sign_div_unsign_mkg:divider|alt_u_div_33e:divider|add_sub_5o8:add_sub_24|add_sub_cella[1]~653
NC1L41 = MB1L21 & (NC1L40 $ GND) # !MB1L21 & !NC1L40 & VCC;