hanshu.tan.summary

用FPGA做的DDS函数信号发生器

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 9.435 ns
From           : m[4]
To             : ADDER4B:inst11|S19[17]
From Clock     : --
To Clock       : cp
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 253.425 ns
From           : ADDER4B:inst11|S19[1]
To             : p[2]
From Clock     : cp
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 97.237 ns
From           : xuanzhe
To             : p[2]
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -4.555 ns
From           : m[0]
To             : ADDER4B:inst11|S19[13]
From Clock     : --
To Clock       : cp
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 180.05 MHz ( period = 5.554 ns )
From           : sM:inst5|altsyncram:altsyncram_component|altsyncram_pov:auto_generated|ram_block1a0~porta_address_reg7
To             : sM:inst5|altsyncram:altsyncram_component|altsyncram_pov:auto_generated|q_a[0]
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'cp'
Slack          : N/A
Required Time  : None
Actual Time    : 251.95 MHz ( period = 3.969 ns )
From           : ADDER4B:inst11|S19[2]
To             : ADDER4B:inst11|S19[17]
From Clock     : cp
To Clock       : cp
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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