lcd.fit.eqn

利用verilogＨＤＬ语言实现ＬＣＤ的驱动编程

state.s1 = DFFEA(state.s1_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L283Q is state.s1~44 at LC1_A3
--operation mode is normal

A1L283Q = state.s1;


--A1L961 is cs2~34 at LC1_A14
--operation mode is normal

A1L961 = !state.s1 & !state.01110 & !state.s9;

--A1L271 is cs2~38 at LC1_A14
--operation mode is normal

A1L271 = !state.s1 & !state.01110 & !state.s9;


--A1L461 is cs1~75 at LC4_A3
--operation mode is normal

A1L461 = !state.s5 & A1L761Q # !A1L961;

--A1L661 is cs1~78 at LC4_A3
--operation mode is normal

A1L661 = !state.s5 & A1L761Q # !A1L961;


--A1L071 is cs2~35 at LC6_A3
--operation mode is normal

A1L071 = rst & (state.s5) # !rst & !A1L471Q & A1L761Q;

--A1L371 is cs2~39 at LC6_A3
--operation mode is normal

A1L371 = rst & (state.s5) # !rst & !A1L471Q & A1L761Q;


--addr1[6] is addr1[6] at LC1_C23
--operation mode is normal

addr1[6]_lut_out = A1L67;
addr1[6] = DFFEA(addr1[6]_lut_out, !GLOBAL(A1L363Q), , , rst, , );

--A1L041Q is addr1[6]~51 at LC1_C23
--operation mode is normal

A1L041Q = addr1[6];


--xpage[7] is xpage[7] at LC2_A24
--operation mode is normal

xpage[7]_lut_out = A1L684 & (A1L663 # xpage[7]) # !rst;
xpage[7] = DFFEA(xpage[7]_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L584Q is xpage[7]~1992 at LC2_A24
--operation mode is normal

A1L584Q = xpage[7];


--xpage[2] is xpage[2] at LC8_A25
--operation mode is normal

xpage[2]_lut_out = A1L884 # !A1L663 & rst & xpage[2];
xpage[2] = DFFEA(xpage[2]_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L574Q is xpage[2]~1993 at LC8_A25
--operation mode is normal

A1L574Q = xpage[2];


--xpage[6] is xpage[6] at LC1_A24
--operation mode is normal

xpage[6]_lut_out = A1L094 & (xpage[6] # A1L984 & A1L784) # !A1L094 & A1L984 & A1L784;
xpage[6] = DFFEA(xpage[6]_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L384Q is xpage[6]~1994 at LC1_A24
--operation mode is normal

A1L384Q = xpage[6];


--A1L1 is LessThan~182 at LC2_A25
--operation mode is normal

A1L1 = !xpage[6] & (!xpage[3] # !xpage[2] # !xpage[4]);

--A1L6 is LessThan~187 at LC2_A25
--operation mode is normal

A1L6 = !xpage[6] & (!xpage[3] # !xpage[2] # !xpage[4]);


--xpage[1] is xpage[1] at LC5_A23
--operation mode is normal

xpage[1]_lut_out = A1L194 # !A1L663 & rst & xpage[1];
xpage[1] = DFFEA(xpage[1]_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L374Q is xpage[1]~1995 at LC5_A23
--operation mode is normal

A1L374Q = xpage[1];


--xpage[0] is xpage[0] at LC2_A23
--operation mode is normal

xpage[0]_lut_out = A1L294 # !A1L663 & rst & xpage[0];
xpage[0] = DFFEA(xpage[0]_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L174Q is xpage[0]~1996 at LC2_A23
--operation mode is normal

A1L174Q = xpage[0];


--A1L2 is LessThan~183 at LC1_A23
--operation mode is normal

A1L2 = !xpage[6] & (!xpage[1] # !xpage[0] # !xpage[5]);

--A1L7 is LessThan~188 at LC1_A23
--operation mode is normal

A1L7 = !xpage[6] & (!xpage[1] # !xpage[0] # !xpage[5]);


--A1L814 is state~1867 at LC3_A25
--operation mode is normal

A1L814 = !A1L2 & !A1L1 & xpage[7] & state.s4;

--A1L734 is state~1920 at LC3_A25
--operation mode is normal

A1L734 = !A1L2 & !A1L1 & xpage[7] & state.s4;


--A1L3 is LessThan~184 at LC5_A25
--operation mode is normal

A1L3 = A1L2 # A1L1 # !xpage[7];

--A1L8 is LessThan~189 at LC5_A25
--operation mode is normal

A1L8 = A1L2 # A1L1 # !xpage[7];


--A1L46 is Select~3482 at LC3_A28
--operation mode is normal

A1L46 = !A1L3 & addr1[6] & state.s8;

--A1L49 is Select~3524 at LC3_A28
--operation mode is normal

A1L49 = !A1L3 & addr1[6] & state.s8;


--addr[0] is addr[0] at LC1_C32
--operation mode is normal

addr[0]_lut_out = A1L97;
addr[0] = DFFEA(addr[0]_lut_out, !GLOBAL(A1L363Q), , , rst, , );

--A1L241Q is addr[0]~321 at LC1_C32
--operation mode is normal

A1L241Q = addr[0];


--addr[6] is addr[6] at LC3_A29
--operation mode is normal

addr[6]_lut_out = A1L28;
addr[6] = DFFEA(addr[6]_lut_out, !GLOBAL(A1L363Q), , , rst, , );

--A1L451Q is addr[6]~322 at LC3_A29
--operation mode is normal

A1L451Q = addr[6];


--addr[5] is addr[5] at LC5_C28
--operation mode is normal

addr[5]_lut_out = !A1L763 & addr[5] # !A1L29;
addr[5] = DFFEA(addr[5]_lut_out, !GLOBAL(A1L363Q), , , rst, , );

--A1L251Q is addr[5]~323 at LC5_C28
--operation mode is normal

A1L251Q = addr[5];


--A1L4 is LessThan~185 at LC7_C36
--operation mode is normal

A1L4 = !addr[5] & !addr[6];

--A1L9 is LessThan~190 at LC7_C36
--operation mode is normal

A1L9 = !addr[5] & !addr[6];


--A1L914 is state~1868 at LC2_C31
--operation mode is normal

A1L914 = rst & (state.s17 # A1L4 & state.s18);

--A1L834 is state~1921 at LC2_C31
--operation mode is normal

A1L834 = rst & (state.s17 # A1L4 & state.s18);


--A1L024 is state~1870 at LC3_C31
--operation mode is normal

A1L024 = rst & (state.s12) # !rst & !A1L714 & state.s13;

--A1L934 is state~1922 at LC3_C31
--operation mode is normal

A1L934 = rst & (state.s12) # !rst & !A1L714 & state.s13;


--A1L5 is LessThan~186 at LC1_C28
--operation mode is normal

A1L5 = addr[5] # addr[6] # addr[4];

--A1L01 is LessThan~191 at LC1_C28
--operation mode is normal

A1L01 = addr[5] # addr[6] # addr[4];


--A1L124 is state~1872 at LC5_C26
--operation mode is normal

A1L124 = rst & (state.s15 # state.s16 & A1L4);

--A1L044 is state~1923 at LC5_C26
--operation mode is normal

A1L044 = rst & (state.s15 # state.s16 & A1L4);


--A1L224 is state~1874 at LC7_C26
--operation mode is normal

A1L224 = rst & (state.s10) # !rst & !A1L714 & state.s11;

--A1L144 is state~1924 at LC7_C26
--operation mode is normal

A1L144 = rst & (state.s10) # !rst & !A1L714 & state.s11;


--A1L324 is state~1878 at LC6_A28
--operation mode is normal

A1L324 = !rst & state.s9 & (A1L471Q $ !A1L761Q);

--A1L244 is state~1925 at LC6_A28
--operation mode is normal

A1L244 = !rst & state.s9 & (A1L471Q $ !A1L761Q);


--A1L424 is state~1880 at LC6_C31
--operation mode is normal

A1L424 = A1L5 & rst & state.s13;

--A1L344 is state~1926 at LC6_C31
--operation mode is normal

A1L344 = A1L5 & rst & state.s13;


--A1L524 is state~1882 at LC4_A29
--operation mode is normal

A1L524 = rst & state.s18 & (addr[5] # addr[6]);

--A1L444 is state~1927 at LC4_A29
--operation mode is normal

A1L444 = rst & state.s18 & (addr[5] # addr[6]);


--A1L624 is state~1886 at LC5_A29
--operation mode is normal

A1L624 = rst & state.s16 & (addr[5] # addr[6]);

--A1L544 is state~1928 at LC5_A29
--operation mode is normal

A1L544 = rst & state.s16 & (addr[5] # addr[6]);


--A1L724 is state~1888 at LC8_A33
--operation mode is normal

A1L724 = rst & state.s11 & A1L5;

--A1L644 is state~1929 at LC8_A33
--operation mode is normal

A1L644 = rst & state.s11 & A1L5;


--state.s7 is state.s7 at LC1_A30
--operation mode is normal

state.s7_lut_out = rst & (state.s6) # !rst & !A1L714 & state.s7;
state.s7 = DFFEA(state.s7_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L493Q is state.s7~19 at LC1_A30
--operation mode is normal

A1L493Q = state.s7;


--A1L824 is state~1890 at LC8_A28
--operation mode is normal

A1L824 = state.s7 # !addr1[6] & state.s8;

--A1L744 is state~1930 at LC8_A28
--operation mode is normal

A1L744 = state.s7 # !addr1[6] & state.s8;


--state.s3 is state.s3 at LC2_B32
--operation mode is normal

state.s3_lut_out = rst & (state.s2) # !rst & !A1L714 & state.s3;
state.s3 = DFFEA(state.s3_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L683Q is state.s3~19 at LC2_B32
--operation mode is normal

A1L683Q = state.s3;


--A1L924 is state~1892 at LC3_A24
--operation mode is normal

A1L924 = state.s3 # !addr1[6] & state.s4;

--A1L844 is state~1931 at LC3_A24
--operation mode is normal

A1L844 = state.s3 # !addr1[6] & state.s4;


--A1L684 is xpage~1953 at LC6_A24
--operation mode is normal

A1L684 = C3_unreg_res_node[7] # !state.s4 & !state.s8 # !A1L3;

--A1L994 is xpage~1997 at LC6_A24
--operation mode is normal

A1L994 = C3_unreg_res_node[7] # !state.s4 & !state.s8 # !A1L3;


--A1L663 is reduce_or~96 at LC2_A28
--operation mode is normal

A1L663 = state.s4 # state.s8 # state.s1 # state.s5;

--A1L073 is reduce_or~100 at LC2_A28
--operation mode is normal

A1L073 = state.s4 # state.s8 # state.s1 # state.s5;


--A1L784 is xpage~1955 at LC4_A24
--operation mode is normal

A1L784 = rst & (state.s4 # state.s8);

--A1L005 is xpage~1998 at LC4_A24
--operation mode is normal

A1L005 = rst & (state.s4 # state.s8);


--E9_cs_buffer[2] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC3_A19
--operation mode is arithmetic

E9_cs_buffer[2] = xpage[2] $ E9_cout[1];

--E9L51 is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~101 at LC3_A19
--operation mode is arithmetic

E9L51 = xpage[2] $ E9_cout[1];

--E9_cout[2] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[2] at LC3_A19
--operation mode is arithmetic

E9_cout[2] = CARRY(xpage[2] & E9_cout[1]);


--A1L884 is xpage~1956 at LC4_A25
--operation mode is normal

A1L884 = A1L784 & (A1L3 & (E9_cs_buffer[2]) # !A1L3 & xpage[2]);

--A1L105 is xpage~1999 at LC4_A25
--operation mode is normal

A1L105 = A1L784 & (A1L3 & (E9_cs_buffer[2]) # !A1L3 & xpage[2]);


--E9_cs_buffer[6] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] at LC7_A19
--operation mode is arithmetic

E9_cs_buffer[6] = xpage[6] $ E9_cout[5];

--E9L32 is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]~102 at LC7_A19
--operation mode is arithmetic

E9L32 = xpage[6] $ E9_cout[5];

--E9_cout[6] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[6] at LC7_A19
--operation mode is arithmetic

E9_cout[6] = CARRY(xpage[6] & E9_cout[5]);


--A1L984 is xpage~1958 at LC7_A24
--operation mode is normal

A1L984 = E9_cs_buffer[6] & (A1L3 # xpage[7] & xpage[6]) # !E9_cs_buffer[6] & xpage[7] & xpage[6];

--A1L205 is xpage~2000 at LC7_A24
--operation mode is normal

A1L205 = E9_cs_buffer[6] & (A1L3 # xpage[7] & xpage[6]) # !E9_cs_buffer[6] & xpage[7] & xpage[6];


--A1L094 is xpage~1959 at LC5_A13
--operation mode is normal

A1L094 = !A1L663 & rst;

--A1L305 is xpage~2001 at LC5_A13
--operation mode is normal

A1L305 = !A1L663 & rst;


--E9_cs_buffer[1] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC2_A19
--operation mode is arithmetic

E9_cs_buffer[1] = xpage[1] $ E9_cout[0];

--E9L31 is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~103 at LC2_A19
--operation mode is arithmetic

E9L31 = xpage[1] $ E9_cout[0];

--E9_cout[1] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[1] at LC2_A19
--operation mode is arithmetic

E9_cout[1] = CARRY(xpage[1] & E9_cout[0]);


--A1L194 is xpage~1961 at LC4_A23
--operation mode is normal

A1L194 = A1L784 & (A1L3 & (E9_cs_buffer[1]) # !A1L3 & xpage[1]);

--A1L405 is xpage~2002 at LC4_A23
--operation mode is normal

A1L405 = A1L784 & (A1L3 & (E9_cs_buffer[1]) # !A1L3 & xpage[1]);


--E9_cs_buffer[0] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[0] at LC1_A19
--operation mode is arithmetic

E9_cs_buffer[0] = addr1[6] $ xpage[0];

--E9L11 is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~104 at LC1_A19
--operation mode is arithmetic

E9L11 = addr1[6] $ xpage[0];

--E9_cout[0] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[0] at LC1_A19
--operation mode is arithmetic

E9_cout[0] = CARRY(addr1[6] & xpage[0]);


--A1L294 is xpage~1963 at LC8_A23
--operation mode is normal

A1L294 = A1L784 & (A1L3 & (E9_cs_buffer[0]) # !A1L3 & xpage[0]);

--A1L505 is xpage~2003 at LC8_A23
--operation mode is normal

A1L505 = A1L784 & (A1L3 & (E9_cs_buffer[0]) # !A1L3 & xpage[0]);


--E3_cs_buffer[2] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC2_C36
--operation mode is arithmetic

E3_cs_buffer[2] = addr[2] $ E3_cout[1];

--E3L11 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~68 at LC2_C36
--operation mode is arithmetic

E3L11 = addr[2] $ E3_cout[1];

--E3_cout[2] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2] at LC2_C36
--operation mode is arithmetic

E3_cout[2] = CARRY(addr[2] & E3_cout[1]);


--A1L56 is Select~3484 at LC2_C33
--operation mode is normal

A1L56 = !state.s11 & !state.s13;

--A1L59 is Select~3525 at LC2_C33
--operation mode is normal