lcd.fit.eqn

利用verilogＨＤＬ语言实现ＬＣＤ的驱动编程

--A1L512 is data~4458 at LC8_C36
--operation mode is normal

A1L512 = rst & (addr[4] & (state.s11) # !addr[4] & state.s16);

--A1L982 is data~4604 at LC8_C36
--operation mode is normal

A1L982 = rst & (addr[4] & (state.s11) # !addr[4] & state.s16);


--A1L41 is Mux~517 at LC2_A36
--operation mode is normal

A1L41 = addr[3] & !addr[2] & addr[1] & !addr[0] # !addr[3] & addr[2] & (addr[1] $ !addr[0]);

--A1L04 is Mux~543 at LC2_A36
--operation mode is normal

A1L04 = addr[3] & !addr[2] & addr[1] & !addr[0] # !addr[3] & addr[2] & (addr[1] $ !addr[0]);


--A1L612 is data~4459 at LC7_A33
--operation mode is normal

A1L612 = A1L412 # A1L41 & A1L512;

--A1L092 is data~4605 at LC7_A33
--operation mode is normal

A1L092 = A1L412 # A1L41 & A1L512;


--state.s19 is state.s19 at LC2_A29
--operation mode is normal

state.s19_lut_out = !A1L524 & (A1L714 # rst # state.s19);
state.s19 = DFFEA(state.s19_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L614Q is state.s19~24 at LC2_A29
--operation mode is normal

A1L614Q = state.s19;


--A1L51 is Mux~518 at LC1_C35
--operation mode is normal

A1L51 = addr[2] & !addr[3] & (addr[1] $ !addr[4]) # !addr[2] & (addr[1] & addr[4]);

--A1L14 is Mux~544 at LC1_C35
--operation mode is normal

A1L14 = addr[2] & !addr[3] & (addr[1] $ !addr[4]) # !addr[2] & (addr[1] & addr[4]);


--A1L61 is Mux~519 at LC2_C35
--operation mode is normal

A1L61 = addr[2] & !addr[3] & (addr[1] $ addr[4]) # !addr[2] & (addr[1] & !addr[4]);

--A1L24 is Mux~545 at LC2_C35
--operation mode is normal

A1L24 = addr[2] & !addr[3] & (addr[1] $ addr[4]) # !addr[2] & (addr[1] & !addr[4]);


--A1L712 is data~4461 at LC7_C35
--operation mode is normal

A1L712 = A1L61 & (state.s16 # A1L51 & state.s11) # !A1L61 & A1L51 & state.s11;

--A1L192 is data~4606 at LC7_C35
--operation mode is normal

A1L192 = A1L61 & (state.s16 # A1L51 & state.s11) # !A1L61 & A1L51 & state.s11;


--A1L812 is data~4462 at LC3_B32
--operation mode is normal

A1L812 = rst & addr[0] & A1L712;

--A1L292 is data~4607 at LC3_B32
--operation mode is normal

A1L292 = rst & addr[0] & A1L712;


--A1L71 is Mux~520 at LC1_C29
--operation mode is normal

A1L71 = addr[4] & (addr[2] & (addr[0]) # !addr[2] & addr[1]) # !addr[4] & (addr[0] # addr[2] $ addr[1]);

--A1L34 is Mux~546 at LC1_C29
--operation mode is normal

A1L34 = addr[4] & (addr[2] & (addr[0]) # !addr[2] & addr[1]) # !addr[4] & (addr[0] # addr[2] $ addr[1]);


--A1L81 is Mux~521 at LC4_B32
--operation mode is normal

A1L81 = addr[4] & (addr[0] # addr[2] $ addr[1]) # !addr[4] & (addr[2] & (addr[0]) # !addr[2] & addr[1]);

--A1L44 is Mux~547 at LC4_B32
--operation mode is normal

A1L44 = addr[4] & (addr[0] # addr[2] $ addr[1]) # !addr[4] & (addr[2] & (addr[0]) # !addr[2] & addr[1]);


--A1L912 is data~4463 at LC5_B32
--operation mode is normal

A1L912 = A1L81 & (state.s18 # A1L71 & state.s13) # !A1L81 & A1L71 & state.s13;

--A1L392 is data~4608 at LC5_B32
--operation mode is normal

A1L392 = A1L81 & (state.s18 # A1L71 & state.s13) # !A1L81 & A1L71 & state.s13;


--A1L022 is data~4465 at LC6_B32
--operation mode is normal

A1L022 = A1L812 # A1L912 & A1L012 # !A1L862;

--A1L492 is data~4609 at LC6_B32
--operation mode is normal

A1L492 = A1L812 # A1L912 & A1L012 # !A1L862;


--state.s15 is state.s15 at LC3_A33
--operation mode is normal

state.s15_lut_out = rst & (state.01110) # !rst & !A1L714 & state.s15;
state.s15 = DFFEA(state.s15_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L804Q is state.s15~28 at LC3_A33
--operation mode is normal

A1L804Q = state.s15;


--state.s10 is state.s10 at LC6_C26
--operation mode is normal

state.s10_lut_out = rst & (state.s9) # !rst & !A1L714 & state.s10;
state.s10 = DFFEA(state.s10_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L004Q is state.s10~23 at LC6_C26
--operation mode is normal

A1L004Q = state.s10;


--xpage[4] is xpage[4] at LC1_A25
--operation mode is normal

xpage[4]_lut_out = !A1L794;
xpage[4] = DFFEA(xpage[4]_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L974Q is xpage[4]~1990 at LC1_A25
--operation mode is normal

A1L974Q = xpage[4];


--A1L122 is data~4466 at LC7_A21
--operation mode is normal

A1L122 = !state.s2 & !state.s6;

--A1L592 is data~4610 at LC7_A21
--operation mode is normal

A1L592 = !state.s2 & !state.s6;


--A1L222 is data~4467 at LC4_A17
--operation mode is normal

A1L222 = state.s10 # state.s15 # !A1L122 & xpage[4];

--A1L692 is data~4611 at LC4_A17
--operation mode is normal

A1L692 = state.s10 # state.s15 # !A1L122 & xpage[4];


--state.s17 is state.s17 at LC1_A29
--operation mode is normal

state.s17_lut_out = A1L624 # !A1L714 & !rst & state.s17;
state.s17 = DFFEA(state.s17_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L214Q is state.s17~37 at LC1_A29
--operation mode is normal

A1L214Q = state.s17;


--state.s12 is state.s12 at LC1_A33
--operation mode is normal

state.s12_lut_out = A1L724 # !A1L714 & !rst & state.s12;
state.s12 = DFFEA(state.s12_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L404Q is state.s12~37 at LC1_A33
--operation mode is normal

A1L404Q = state.s12;


--A1L463 is reduce_or~94 at LC1_A28
--operation mode is normal

A1L463 = !state.01110 & !state.s9 & !state.s12 & !state.s17;

--A1L863 is reduce_or~98 at LC1_A28
--operation mode is normal

A1L863 = !state.01110 & !state.s9 & !state.s12 & !state.s17;


--A1L322 is data~4469 at LC7_A3
--operation mode is normal

A1L322 = !rst & (A1L471Q $ A1L761Q);

--A1L792 is data~4612 at LC7_A3
--operation mode is normal

A1L792 = !rst & (A1L471Q $ A1L761Q);


--xpage[5] is xpage[5] at LC3_A23
--operation mode is normal

xpage[5]_lut_out = !A1L894;
xpage[5] = DFFEA(xpage[5]_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L184Q is xpage[5]~1991 at LC3_A23
--operation mode is normal

A1L184Q = xpage[5];


--A1L422 is data~4470 at LC3_C32
--operation mode is normal

A1L422 = rst & (!A1L122 & xpage[5] # !A1L463);

--A1L892 is data~4613 at LC3_C32
--operation mode is normal

A1L892 = rst & (!A1L122 & xpage[5] # !A1L463);


--A1L522 is data~4471 at LC1_A31
--operation mode is normal

A1L522 = A1L391Q & (!rst # !state.s19);

--A1L992 is data~4614 at LC1_A31
--operation mode is normal

A1L992 = A1L391Q & (!rst # !state.s19);


--A1L622 is data~4474 at LC3_C35
--operation mode is normal

A1L622 = !addr[2] & !addr[0] & addr[1] & addr[3];

--A1L003 is data~4615 at LC3_C35
--operation mode is normal

A1L003 = !addr[2] & !addr[0] & addr[1] & addr[3];


--A1L91 is Mux~522 at LC5_C35
--operation mode is normal

A1L91 = addr[3] & (addr[1] # addr[4] # !addr[2]) # !addr[3] & (addr[2] $ addr[1] $ addr[4]);

--A1L54 is Mux~548 at LC5_C35
--operation mode is normal

A1L54 = addr[3] & (addr[1] # addr[4] # !addr[2]) # !addr[3] & (addr[2] $ addr[1] $ addr[4]);


--A1L722 is data~4475 at LC4_C35
--operation mode is normal

A1L722 = addr[4] & !A1L91 & (addr[0]) # !addr[4] & (A1L622 # !A1L91 & addr[0]);

--A1L103 is data~4616 at LC4_C35
--operation mode is normal

A1L103 = addr[4] & !A1L91 & (addr[0]) # !addr[4] & (A1L622 # !A1L91 & addr[0]);


--A1L822 is data~4476 at LC2_C29
--operation mode is normal

A1L822 = rst & state.s13 & A1L722;

--A1L203 is data~4617 at LC2_C29
--operation mode is normal

A1L203 = rst & state.s13 & A1L722;


--A1L02 is Mux~523 at LC8_C35
--operation mode is normal

A1L02 = addr[3] & addr[2] & !addr[1] & addr[4] # !addr[3] & (addr[2] $ addr[1] $ addr[4]);

--A1L64 is Mux~549 at LC8_C35
--operation mode is normal

A1L64 = addr[3] & addr[2] & !addr[1] & addr[4] # !addr[3] & (addr[2] $ addr[1] $ addr[4]);


--A1L922 is data~4477 at LC6_C35
--operation mode is normal

A1L922 = A1L02 & (addr[0] # A1L622 & addr[4]) # !A1L02 & A1L622 & addr[4];

--A1L303 is data~4618 at LC6_C35
--operation mode is normal

A1L303 = A1L02 & (addr[0] # A1L622 & addr[4]) # !A1L02 & A1L622 & addr[4];


--A1L032 is data~4478 at LC3_C29
--operation mode is normal

A1L032 = A1L822 # rst & state.s18 & A1L922;

--A1L403 is data~4619 at LC3_C29
--operation mode is normal

A1L403 = A1L822 # rst & state.s18 & A1L922;


--A1L132 is data~4479 at LC4_C26
--operation mode is normal

A1L132 = addr[4] & (state.s11) # !addr[4] & state.s16;

--A1L503 is data~4620 at LC4_C26
--operation mode is normal

A1L503 = addr[4] & (state.s11) # !addr[4] & state.s16;


--A1L232 is data~4480 at LC5_C29
--operation mode is normal

A1L232 = !addr[1] & addr[2] & addr[3] & rst;

--A1L603 is data~4621 at LC5_C29
--operation mode is normal

A1L603 = !addr[1] & addr[2] & addr[3] & rst;


--A1L332 is data~4481 at LC6_C29
--operation mode is normal

A1L332 = !addr[0] & A1L232 & A1L132;

--A1L703 is data~4622 at LC6_C29
--operation mode is normal

A1L703 = !addr[0] & A1L232 & A1L132;


--A1L12 is Mux~524 at LC3_C34
--operation mode is normal

A1L12 = addr[4] & addr[0] & (addr[2] # !addr[1]) # !addr[4] & addr[2] & (addr[1] $ !addr[0]);

--A1L74 is Mux~550 at LC3_C34
--operation mode is normal

A1L74 = addr[4] & addr[0] & (addr[2] # !addr[1]) # !addr[4] & addr[2] & (addr[1] $ !addr[0]);


--A1L22 is Mux~525 at LC4_C34
--operation mode is normal

A1L22 = addr[4] & addr[2] & (addr[1] $ !addr[0]) # !addr[4] & addr[0] & (addr[2] # !addr[1]);

--A1L84 is Mux~551 at LC4_C34
--operation mode is normal

A1L84 = addr[4] & addr[2] & (addr[1] $ !addr[0]) # !addr[4] & addr[0] & (addr[2] # !addr[1]);


--A1L432 is data~4482 at LC5_C34
--operation mode is normal

A1L432 = A1L22 & (state.s16 # A1L12 & state.s11) # !A1L22 & A1L12 & state.s11;

--A1L803 is data~4623 at LC5_C34
--operation mode is normal

A1L803 = A1L22 & (state.s16 # A1L12 & state.s11) # !A1L22 & A1L12 & state.s11;


--A1L532 is data~4483 at LC7_C29
--operation mode is normal

A1L532 = A1L332 # !addr[3] & rst & A1L432;

--A1L903 is data~4624 at LC7_C29
--operation mode is normal

A1L903 = A1L332 # !addr[3] & rst & A1L432;


--A1L632 is data~4484 at LC8_C29
--operation mode is normal

A1L632 = A1L532 # !A1L714 & !rst & A1L691Q;

--A1L013 is data~4625 at LC8_C29
--operation mode is normal

A1L013 = A1L532 # !A1L714 & !rst & A1L691Q;


--A1L563 is reduce_or~95 at LC8_C32
--operation mode is normal

A1L563 = !state.s11 & !state.s13 & !state.s16 & !state.s18;

--A1L963 is reduce_or~99 at LC8_C32
--operation mode is normal

A1L963 = !state.s11 & !state.s13 & !state.s16 & !state.s18;


--state.s8 is state.s8 at LC5_A28
--operation mode is normal

state.s8_lut_out = rst & (A1L824) # !rst & !A1L714 & state.s8;
state.s8 = DFFEA(state.s8_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L693Q is state.s8~68 at LC5_A28
--operation mode is normal

A1L693Q = state.s8;


--state.s4 is state.s4 at LC5_A24
--operation mode is normal

state.s4_lut_out = rst & (A1L924) # !rst & !A1L714 & state.s4;
state.s4 = DFFEA(state.s4_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L883Q is state.s4~70 at LC5_A24
--operation mode is normal

A1L883Q = state.s4;


--A1L36 is Select~3481 at LC8_A24
--operation mode is normal

A1L36 = !state.s4 & !state.s8;

--A1L39 is Select~3523 at LC8_A24
--operation mode is normal

A1L39 = !state.s4 & !state.s8;


--A1L473 is rs~147 at LC2_A35
--operation mode is normal

A1L473 = !state.s19 & A1L773Q # !A1L563 # !A1L36;

--A1L673 is rs~150 at LC2_A35
--operation mode is normal

A1L673 = !state.s19 & A1L773Q # !A1L563 # !A1L36;


--count[0] is count[0] at LC2_A2
--operation mode is normal

count[0]_lut_out = !count[0];
count[0] = DFFEA(count[0]_lut_out, GLOBAL(clk), , , , , );

--A1L851Q is count[0]~8 at LC2_A2
--operation mode is normal

A1L851Q = count[0];


--count[2] is count[2] at LC3_A2
--operation mode is normal

count[2]_lut_out = count[2] $ (count[1] & count[0]);
count[2] = DFFEA(count[2]_lut_out, GLOBAL(clk), , , , , );

--A1L261Q is count[2]~9 at LC3_A2
--operation mode is normal

A1L261Q = count[2];


--count[1] is count[1] at LC4_A2
--operation mode is normal

count[1]_lut_out = count[1] $ count[0];
count[1] = DFFEA(count[1]_lut_out, GLOBAL(clk), , , , , );

--A1L061Q is count[1]~10 at LC4_A2
--operation mode is normal

A1L061Q = count[1];


--state.s5 is state.s5 at LC2_A30
--operation mode is normal

state.s5_lut_out = !A1L534;
state.s5 = DFFEA(state.s5_lut_out, !GLOBAL(A1L363Q), , , , , );

--A1L093Q is state.s5~38 at LC2_A30
--operation mode is normal

A1L093Q = state.s5;


--state.s1 is state.s1 at LC1_A3
--operation mode is normal

state.s1_lut_out = !rst & (state.s1 # A1L471Q $ A1L761Q);