📄 speaker.map.eqn
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
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-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--D1_\delayspks:count2 is speaker:u3|\delayspks:count2
--operation mode is normal
D1_\delayspks:count2_lut_out = !D1_\delayspks:count2;
D1_\delayspks:count2 = DFFEAS(D1_\delayspks:count2_lut_out, D1_fullspks, VCC, , , , , , );
--D1_fullspks is speaker:u3|fullspks
--operation mode is normal
D1_fullspks_lut_out = D1L43;
D1_fullspks = DFFEAS(D1_fullspks_lut_out, D1L03, VCC, , , , , , );
--D1_\genspks:count11[0] is speaker:u3|\genspks:count11[0]
--operation mode is arithmetic
D1_\genspks:count11[0]_lut_out = !D1_\genspks:count11[0];
D1_\genspks:count11[0] = DFFEAS(D1_\genspks:count11[0]_lut_out, D1L03, VCC, , , C1_tone[0], , , D1L43);
--D1L7 is speaker:u3|\genspks:count11[0]~15
--operation mode is arithmetic
D1L7 = CARRY(D1_\genspks:count11[0]);
--D1_\genspks:count11[1] is speaker:u3|\genspks:count11[1]
--operation mode is arithmetic
D1_\genspks:count11[1]_carry_eqn = D1L7;
D1_\genspks:count11[1]_lut_out = D1_\genspks:count11[1] $ (D1_\genspks:count11[1]_carry_eqn);
D1_\genspks:count11[1] = DFFEAS(D1_\genspks:count11[1]_lut_out, D1L03, VCC, , , C1_tone[1], , , D1L43);
--D1L9 is speaker:u3|\genspks:count11[1]~15
--operation mode is arithmetic
D1L9 = CARRY(!D1L7 # !D1_\genspks:count11[1]);
--D1_\genspks:count11[2] is speaker:u3|\genspks:count11[2]
--operation mode is arithmetic
D1_\genspks:count11[2]_carry_eqn = D1L9;
D1_\genspks:count11[2]_lut_out = D1_\genspks:count11[2] $ (!D1_\genspks:count11[2]_carry_eqn);
D1_\genspks:count11[2] = DFFEAS(D1_\genspks:count11[2]_lut_out, D1L03, VCC, , , C1_tone[2], , , D1L43);
--D1L11 is speaker:u3|\genspks:count11[2]~15
--operation mode is arithmetic
D1L11 = CARRY(D1_\genspks:count11[2] & (!D1L9));
--D1_\genspks:count11[3] is speaker:u3|\genspks:count11[3]
--operation mode is arithmetic
D1_\genspks:count11[3]_carry_eqn = D1L11;
D1_\genspks:count11[3]_lut_out = D1_\genspks:count11[3] $ (D1_\genspks:count11[3]_carry_eqn);
D1_\genspks:count11[3] = DFFEAS(D1_\genspks:count11[3]_lut_out, D1L03, VCC, , , C1_tone[3], , , D1L43);
--D1L31 is speaker:u3|\genspks:count11[3]~15
--operation mode is arithmetic
D1L31 = CARRY(!D1L11 # !D1_\genspks:count11[3]);
--D1L13 is speaker:u3|reduce_nor~68
--operation mode is normal
D1L13 = !D1_\genspks:count11[3] # !D1_\genspks:count11[2] # !D1_\genspks:count11[1] # !D1_\genspks:count11[0];
--D1_\genspks:count11[4] is speaker:u3|\genspks:count11[4]
--operation mode is arithmetic
D1_\genspks:count11[4]_carry_eqn = D1L31;
D1_\genspks:count11[4]_lut_out = D1_\genspks:count11[4] $ (!D1_\genspks:count11[4]_carry_eqn);
D1_\genspks:count11[4] = DFFEAS(D1_\genspks:count11[4]_lut_out, D1L03, VCC, , , C1_tone[4], , , D1L43);
--D1L51 is speaker:u3|\genspks:count11[4]~15
--operation mode is arithmetic
D1L51 = CARRY(D1_\genspks:count11[4] & (!D1L31));
--D1_\genspks:count11[5] is speaker:u3|\genspks:count11[5]
--operation mode is arithmetic
D1_\genspks:count11[5]_carry_eqn = D1L51;
D1_\genspks:count11[5]_lut_out = D1_\genspks:count11[5] $ (D1_\genspks:count11[5]_carry_eqn);
D1_\genspks:count11[5] = DFFEAS(D1_\genspks:count11[5]_lut_out, D1L03, VCC, , , C1_tone[5], , , D1L43);
--D1L71 is speaker:u3|\genspks:count11[5]~15
--operation mode is arithmetic
D1L71 = CARRY(!D1L51 # !D1_\genspks:count11[5]);
--D1_\genspks:count11[6] is speaker:u3|\genspks:count11[6]
--operation mode is arithmetic
D1_\genspks:count11[6]_carry_eqn = D1L71;
D1_\genspks:count11[6]_lut_out = D1_\genspks:count11[6] $ (!D1_\genspks:count11[6]_carry_eqn);
D1_\genspks:count11[6] = DFFEAS(D1_\genspks:count11[6]_lut_out, D1L03, VCC, , , C1_tone[6], , , D1L43);
--D1L91 is speaker:u3|\genspks:count11[6]~15
--operation mode is arithmetic
D1L91 = CARRY(D1_\genspks:count11[6] & (!D1L71));
--D1_\genspks:count11[7] is speaker:u3|\genspks:count11[7]
--operation mode is arithmetic
D1_\genspks:count11[7]_carry_eqn = D1L91;
D1_\genspks:count11[7]_lut_out = D1_\genspks:count11[7] $ (D1_\genspks:count11[7]_carry_eqn);
D1_\genspks:count11[7] = DFFEAS(D1_\genspks:count11[7]_lut_out, D1L03, VCC, , , C1_tone[7], , , D1L43);
--D1L12 is speaker:u3|\genspks:count11[7]~15
--operation mode is arithmetic
D1L12 = CARRY(!D1L91 # !D1_\genspks:count11[7]);
--D1L23 is speaker:u3|reduce_nor~69
--operation mode is normal
D1L23 = !D1_\genspks:count11[7] # !D1_\genspks:count11[6] # !D1_\genspks:count11[5] # !D1_\genspks:count11[4];
--D1_\genspks:count11[9] is speaker:u3|\genspks:count11[9]
--operation mode is arithmetic
D1_\genspks:count11[9]_carry_eqn = D1L32;
D1_\genspks:count11[9]_lut_out = D1_\genspks:count11[9] $ (D1_\genspks:count11[9]_carry_eqn);
D1_\genspks:count11[9] = DFFEAS(D1_\genspks:count11[9]_lut_out, D1L03, VCC, , , C1_tone[9], , , D1L43);
--D1L52 is speaker:u3|\genspks:count11[9]~15
--operation mode is arithmetic
D1L52 = CARRY(!D1L32 # !D1_\genspks:count11[9]);
--D1_\genspks:count11[10] is speaker:u3|\genspks:count11[10]
--operation mode is normal
D1_\genspks:count11[10]_carry_eqn = D1L52;
D1_\genspks:count11[10]_lut_out = D1_\genspks:count11[10] $ (!D1_\genspks:count11[10]_carry_eqn);
D1_\genspks:count11[10] = DFFEAS(D1_\genspks:count11[10]_lut_out, D1L03, VCC, , , C1_tone[10], , , D1L43);
--D1L33 is speaker:u3|reduce_nor~70
--operation mode is normal
D1L33 = !D1_\genspks:count11[10] # !D1_\genspks:count11[9];
--D1_\genspks:count11[8] is speaker:u3|\genspks:count11[8]
--operation mode is arithmetic
D1_\genspks:count11[8]_carry_eqn = D1L12;
D1_\genspks:count11[8]_lut_out = D1_\genspks:count11[8] $ (!D1_\genspks:count11[8]_carry_eqn);
D1_\genspks:count11[8] = DFFEAS(D1_\genspks:count11[8]_lut_out, D1L03, VCC, , , C1_tone[8], , , D1L43);
--D1L32 is speaker:u3|\genspks:count11[8]~15
--operation mode is arithmetic
D1L32 = CARRY(D1_\genspks:count11[8] & (!D1L12));
--D1L43 is speaker:u3|reduce_nor~71
--operation mode is normal
D1L43 = !D1L13 & !D1L23 & !D1L33 & D1_\genspks:count11[8];
--D1_\divideclk:count4[3] is speaker:u3|\divideclk:count4[3]
--operation mode is normal
D1_\divideclk:count4[3]_lut_out = !D1_\divideclk:count4[3];
D1_\divideclk:count4[3] = DFFEAS(D1_\divideclk:count4[3]_lut_out, clk12MHZ, !D1L03, , D1L72, , , , );
--D1_\divideclk:count4[2] is speaker:u3|\divideclk:count4[2]
--operation mode is normal
D1_\divideclk:count4[2]_lut_out = !D1_\divideclk:count4[2];
D1_\divideclk:count4[2] = DFFEAS(D1_\divideclk:count4[2]_lut_out, clk12MHZ, !D1L03, , D1L82, , , , );
--D1L03 is speaker:u3|LessThan~40
--operation mode is normal
D1L03 = D1_\divideclk:count4[3] & D1_\divideclk:count4[2];
--D1_\divideclk:count4[1] is speaker:u3|\divideclk:count4[1]
--operation mode is normal
D1_\divideclk:count4[1]_lut_out = !D1_\divideclk:count4[1];
D1_\divideclk:count4[1] = DFFEAS(D1_\divideclk:count4[1]_lut_out, clk12MHZ, !D1L03, , D1_\divideclk:count4[0], , , , );
--D1_\divideclk:count4[0] is speaker:u3|\divideclk:count4[0]
--operation mode is normal
D1_\divideclk:count4[0]_lut_out = !D1_\divideclk:count4[0];
D1_\divideclk:count4[0] = DFFEAS(D1_\divideclk:count4[0]_lut_out, clk12MHZ, !D1L03, , , , , , );
--D1L72 is speaker:u3|add~265
--operation mode is normal
D1L72 = D1_\divideclk:count4[2] & D1_\divideclk:count4[1] & D1_\divideclk:count4[0];
--D1L82 is speaker:u3|add~266
--operation mode is normal
D1L82 = D1_\divideclk:count4[1] & D1_\divideclk:count4[0];
--G1_q_a[0] is notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_kiq:auto_generated|q_a[0]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 4
--Port A Input: Registered, Port A Output: Registered
G1_q_a[0]_PORT_A_address = BUS(B1_counter[0], B1_counter[1], B1_counter[2], B1_counter[3], B1_counter[4], B1_counter[5], B1_counter[6], B1_counter[7]);
G1_q_a[0]_PORT_A_address_reg = DFFE(G1_q_a[0]_PORT_A_address, G1_q_a[0]_clock_0, , , );
G1_q_a[0]_clock_0 = clk8HZ;
G1_q_a[0]_PORT_A_data_out = MEMORY(, , G1_q_a[0]_PORT_A_address_reg, , , , , , G1_q_a[0]_clock_0, , , , , );
G1_q_a[0]_PORT_A_data_out_reg = DFFE(G1_q_a[0]_PORT_A_data_out, G1_q_a[0]_clock_0, , , );
G1_q_a[0] = G1_q_a[0]_PORT_A_data_out_reg[0];
--G1_q_a[1] is notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_kiq:auto_generated|q_a[1]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 4
--Port A Input: Registered, Port A Output: Registered
G1_q_a[1]_PORT_A_address = BUS(B1_counter[0], B1_counter[1], B1_counter[2], B1_counter[3], B1_counter[4], B1_counter[5], B1_counter[6], B1_counter[7]);
G1_q_a[1]_PORT_A_address_reg = DFFE(G1_q_a[1]_PORT_A_address, G1_q_a[1]_clock_0, , , );
G1_q_a[1]_clock_0 = clk8HZ;
G1_q_a[1]_PORT_A_data_out = MEMORY(, , G1_q_a[1]_PORT_A_address_reg, , , , , , G1_q_a[1]_clock_0, , , , , );
G1_q_a[1]_PORT_A_data_out_reg = DFFE(G1_q_a[1]_PORT_A_data_out, G1_q_a[1]_clock_0, , , );
G1_q_a[1] = G1_q_a[1]_PORT_A_data_out_reg[0];
--G1_q_a[2] is notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_kiq:auto_generated|q_a[2]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 4
--Port A Input: Registered, Port A Output: Registered
G1_q_a[2]_PORT_A_address = BUS(B1_counter[0], B1_counter[1], B1_counter[2], B1_counter[3], B1_counter[4], B1_counter[5], B1_counter[6], B1_counter[7]);
G1_q_a[2]_PORT_A_address_reg = DFFE(G1_q_a[2]_PORT_A_address, G1_q_a[2]_clock_0, , , );
G1_q_a[2]_clock_0 = clk8HZ;
G1_q_a[2]_PORT_A_data_out = MEMORY(, , G1_q_a[2]_PORT_A_address_reg, , , , , , G1_q_a[2]_clock_0, , , , , );
G1_q_a[2]_PORT_A_data_out_reg = DFFE(G1_q_a[2]_PORT_A_data_out, G1_q_a[2]_clock_0, , , );
G1_q_a[2] = G1_q_a[2]_PORT_A_data_out_reg[0];
--G1_q_a[3] is notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_kiq:auto_generated|q_a[3]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 4
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