key_control.vhd

软件开发环境：ISE 7.1i 仿真环境：ModelSim SE 6.0 1. 闹钟设计

------键盘控制，若按下键盘则输出keydown=1---------
library ieee;
use ieee.std_logic_1164.all;
entity key_control is
port(key:in std_logic_vector(9 downto 0);
	keydown: out std_logic);
end entity key_control;
architecture one of key_control is
begin
keydown<=key(0) or key(1) or key(2) or key(3) or key(4) or key(5) or key(6) or key(7) or key(8) or key(9);
end architecture one;