time_lock.qws

软件开发环境：ISE 7.1i 仿真环境：ModelSim SE 6.0 1. 闹钟设计

[ProjectWorkspace]
ptn_Child1=Frames
ptn_Child2=ActionPoints
[ProjectWorkspace.Frames]
ptn_Child1=ChildFrames
[ProjectWorkspace.Frames.ChildFrames]
ptn_Child1=Document-0
ptn_Child2=Document-1
ptn_Child3=Document-2
ptn_Child4=Document-3
[ProjectWorkspace.Frames.ChildFrames.Document-0]
ptn_Child1=ViewFrame-0
[ProjectWorkspace.Frames.ChildFrames.Document-0.ViewFrame-0]
DocPathName=time_lock.vhd
DocumentCLSID={ca385d57-a4c7-11d1-a098-0020affa43f2}
WindowPlacement=MCAAAAAAAAAAAAAABAAAAAAAPPPPPPPPPPPPPPPPMPPPPPPPCOPPPPPPFAAAAAAAABAAAAAANNCAAAAALEBAAAAA
IsActiveChildFrame=False
ptn_Child1=StateMap
[ProjectWorkspace.Frames.ChildFrames.Document-0.ViewFrame-0.StateMap]
AFC_IN_REPORT=False
[ProjectWorkspace.Frames.ChildFrames.Document-1]
ptn_Child1=ViewFrame-0
[ProjectWorkspace.Frames.ChildFrames.Document-1.ViewFrame-0]
DocPathName=time_lock.vwf
DocumentCLSID={4a9ed22a-e60b-11d1-a0bd-0020affa43f2}
WindowPlacement=MCAAAAAAAAAAAAAABAAAAAAAPPPPPPPPPPPPPPPPMPPPPPPPCOPPPPPPMCAAAAAAKDAAAAAAEADAAAAAFHBAAAAA
IsActiveChildFrame=False
ptn_Child1=StateMap
[ProjectWorkspace.Frames.ChildFrames.Document-1.ViewFrame-0.StateMap]
AFC_SIM_AP_NAME=time_lock
AFC_PROJ_DB_PATH=D:/eda设计/VHDL/闹钟设计/db/time_lock.quartus_db
AFC_IN_REPORT=False