hdllib.ref

一种实现计算机接口rs232与FPGA通信的基于VHDL语言设计的一段非常简洁的程序

EN reciever NULL "F:/data file/uart01/reciever.vhd" sub00/vhpl02 1236951642
EN top NULL "F:/data file/uart01/uart.vhd" sub00/vhpl06 1236951646
AR transfer behavioral "F:/data file/uart01/transfer.vhd" sub00/vhpl05 1236951645
AR top behavioral "F:/data file/uart01/uart.vhd" sub00/vhpl07 1236951647
EN baud NULL "F:/data file/uart01/baud.vhd" sub00/vhpl00 1236951640
AR reciever behavioral "F:/data file/uart01/reciever.vhd" sub00/vhpl03 1236951643
AR baud behavioral "F:/data file/uart01/baud.vhd" sub00/vhpl01 1236951641
EN transfer NULL "F:/data file/uart01/transfer.vhd" sub00/vhpl04 1236951644