📄 altera_avalon_uart_init.c
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*/
ALT_FLAG_PEND (sp->events,
ALT_UART_WRITE_RDY,
OS_FLAG_WAIT_SET_ANY + OS_FLAG_CONSUME,
0);
}
while ((next == sp->tx_start));
}
}
count--;
/* Add the next character to the transmit buffer */
sp->tx_buf[sp->tx_end] = *ptr++;
sp->tx_end = next;
}
/*
* Now that access to the circular buffer is complete, release the write
* semaphore so that other threads can access the buffer.
*/
ALT_SEM_POST (sp->write_lock);
/*
* Ensure that interrupts are enabled, so that the circular buffer can
* drain.
*/
context = alt_irq_disable_all ();
sp->ctrl |= ALTERA_AVALON_UART_CONTROL_TRDY_MSK |
ALTERA_AVALON_UART_CONTROL_DCTS_MSK;
IOWR_ALTERA_AVALON_UART_CONTROL(sp->base, sp->ctrl);
alt_irq_enable_all (context);
/* return the number of bytes written */
return (len - count);
}
#if !defined(ALT_USE_SMALL_DRIVERS) && !defined(ALTERA_AVALON_UART_SMALL)
/* ----------------------------------------------------------- */
/* ------------------------- FAST DRIVER --------------------- */
/* ----------------------------------------------------------- */
/*
* altera_avalon_uart_init() is called by the auto-generated function
* alt_sys_init() in order to initialize a particular instance of this device.
* It is responsible for configuring the device and associated software
* constructs.
*/
static void altera_avalon_uart_irq(void* context, alt_u32 id);
static void altera_avalon_uart_rxirq(altera_avalon_uart_state* sp,
alt_u32 status);
static void altera_avalon_uart_txirq(altera_avalon_uart_state* sp,
alt_u32 status);
void
altera_avalon_uart_init(altera_avalon_uart_state* sp, alt_u32 irq)
{
void* base = sp->base;
int error;
/*
* Initialise the read and write flags and the semaphores used to
* protect access to the circular buffers when running in a multi-threaded
* environment.
*/
error = ALT_FLAG_CREATE (&sp->events, 0) ||
ALT_SEM_CREATE (&sp->read_lock, 1) ||
ALT_SEM_CREATE (&sp->write_lock, 1);
if (!error)
{
/* enable interrupts at the device */
sp->ctrl = ALTERA_AVALON_UART_CONTROL_RTS_MSK |
ALTERA_AVALON_UART_CONTROL_RRDY_MSK |
ALTERA_AVALON_UART_CONTROL_DCTS_MSK;
IOWR_ALTERA_AVALON_UART_CONTROL(base, sp->ctrl);
/* register the interrupt handler */
alt_irq_register (irq, sp, altera_avalon_uart_irq);
}
}
/*
* altera_avalon_uart_irq() is the interrupt handler registered at configuration
* time for processing UART interrupts. It vectors interrupt requests to
* either altera_avalon_uart_rxirq() (for incoming data), or
* altera_avalon_uart_txirq() (for outgoing data).
*/
static void
altera_avalon_uart_irq(void* context, alt_u32 id)
{
alt_u32 status;
altera_avalon_uart_state* sp = (altera_avalon_uart_state*) context;
void* base = sp->base;
/*
* Read the status register in order to determine the cause of the
* interrupt.
*/
status = IORD_ALTERA_AVALON_UART_STATUS(base);
/* Clear any error flags set at the device */
IOWR_ALTERA_AVALON_UART_STATUS(base, 0);
/* process a read irq */
if (status & ALTERA_AVALON_UART_STATUS_RRDY_MSK)
{
altera_avalon_uart_rxirq(sp, status);
}
/* process a write irq */
if (status & (ALTERA_AVALON_UART_STATUS_TRDY_MSK |
ALTERA_AVALON_UART_STATUS_DCTS_MSK))
{
altera_avalon_uart_txirq(sp, status);
}
}
/*
* altera_avalon_uart_rxirq() is called by altera_avalon_uart_irq() to process a
* receive interrupt. It transfers the incoming character into the receive
* circular buffer, and sets the apropriate flags to indicate that there is
* dat ready to be processed.
*/
static void
altera_avalon_uart_rxirq(altera_avalon_uart_state* sp, alt_u32 status)
{
alt_u32 next;
/*
* In a multi-threaded environment, set the read event flag to indicate
* that there is data ready. This is only done if the circular buffer was
* previously empty.
*/
if (sp->rx_end == sp->rx_start)
{
ALT_FLAG_POST (sp->events, ALT_UART_READ_RDY, OS_FLAG_SET);
}
/* Determine which slot to use next in the circular buffer */
next = (sp->rx_end + 1) & ALT_AVALON_UART_BUF_MSK;
/* Transfer data from the device to the circular buffer */
sp->rx_buf[sp->rx_end] = IORD_ALTERA_AVALON_UART_RXDATA(sp->base);
/* If there was an error, discard the data */
if (status & (ALTERA_AVALON_UART_STATUS_PE_MSK |
ALTERA_AVALON_UART_STATUS_FE_MSK))
{
return;
}
sp->rx_end = next;
next = (sp->rx_end + 1) & ALT_AVALON_UART_BUF_MSK;
/*
* If the cicular buffer was full, disable interrupts. Interrupts will be
* re-enabled when data is removed from the buffer.
*/
if (next == sp->rx_start)
{
sp->ctrl &= ~ALTERA_AVALON_UART_CONTROL_RRDY_MSK;
IOWR_ALTERA_AVALON_UART_CONTROL(sp->base, sp->ctrl);
}
fsm[state](sp);
}
/*
* altera_avalon_uart_txirq() is called by altera_avalon_uart_irq() to process a
* transmit interrupt. It transfers data from the transmit buffer to the
* device, and sets the apropriate flags to indicate that there is
* data ready to be processed.
*/
static void
altera_avalon_uart_txirq(altera_avalon_uart_state* sp, alt_u32 status)
{
/* Transfer data if there is some ready to be transfered */
if (sp->tx_start != sp->tx_end)
{
/*
* If the device is using flow control (i.e. RTS/CTS), then the
* transmitter is required to throttle if CTS is high.
*/
if (!(sp->flags & ALT_AVALON_UART_FC) ||
(status & ALTERA_AVALON_UART_STATUS_CTS_MSK))
{
/*
* In a multi-threaded environment, set the write event flag to indicate
* that there is space in the circular buffer. This is only done if the
* buffer was previously empty.
*/
if (sp->tx_start == ((sp->tx_end + 1) & ALT_AVALON_UART_BUF_MSK))
{
ALT_FLAG_POST (sp->events,
ALT_UART_WRITE_RDY,
OS_FLAG_SET);
}
/* Write the data to the device */
IOWR_ALTERA_AVALON_UART_TXDATA(sp->base, sp->tx_buf[sp->tx_start]);
sp->tx_start = (++sp->tx_start) & ALT_AVALON_UART_BUF_MSK;
/*
* In case the tranmit interrupt had previously been disabled by
* detecting a low value on CTS, it is reenabled here.
*/
sp->ctrl |= ALTERA_AVALON_UART_CONTROL_TRDY_MSK;
}
else
{
/*
* CTS is low and we are using flow control, so disable the transmit
* interrupt while we wait for CTS to go high again. This will be
* detected using the DCTS interrupt.
*
* There is a race condition here. "status" may indicate that
* CTS is low, but it actually went high before DCTS was cleared on
* the last write to the status register. To avoid this resulting in
* deadlock, it's necessary to re-check the status register here
* before throttling.
*/
status = IORD_ALTERA_AVALON_UART_STATUS(sp->base);
if (!(status & ALTERA_AVALON_UART_STATUS_CTS_MSK))
{
sp->ctrl &= ~ALTERA_AVALON_UART_CONTROL_TRDY_MSK;
}
}
}
/*
* If the circular buffer is empty, disable the interrupt. This will be
* re-enabled when new data is placed in the buffer.
*/
if (sp->tx_start == sp->tx_end)
{
sp->ctrl &= ~(ALTERA_AVALON_UART_CONTROL_TRDY_MSK |
ALTERA_AVALON_UART_CONTROL_DCTS_MSK);
}
IOWR_ALTERA_AVALON_UART_CONTROL(sp->base, sp->ctrl);
}
//int parse_operation(void)
//{
// int i,duanzu_number;
//
// /*protocol_command*/
// prl_com=data[0];
//
// switch(prl_com)
// {
//
// case update32duanzu:
//
// newduanzu=data[0]|(data[1]<<8)|(data[2]<<16)|(data[3]<<24);
// duanzu_psr_init();
//
// break;
//
///*update_duanzu:(duanzunumber;(duanzu_mode;duanzu_data))*/
//case update_n_duanzu:
// duanzu_number=data[0];
// for(i=1;i<=duanzu_number;i++)
// {
// duanzu_hao=data[(3*(i-1)+1)];
// duanzu_mode=data[(3*(i-1)+2)];
// duanzu_data=data[(3*(i-1)+3)];
// duanzu_psr[duanzu_hao]=(duanzu_mode<<8)|duanzu_data;
// }
//
//break;
//
//
//case update_transition:
// duanzu_number=data[0];
// for(i=0;i<=31;i++)
// {
// transition[duanzu_number][i]=data[i];
// }
//
//break;
//
//
//case update_transition_phase:
// duanzu_number=data[0];
// for(i=1;i<=3;i++)
// {
// transition_phase[duanzu_number][i]=data[i];
// }
//break;
//
//
//case delay_table:
// duanzu_number=data[0];
// for(i=1;i<=duanzu_number;i++)
// {
// duanzu_hao=data[(3*(i-1)+1)];
// duanzu_mode=delay;
// duanzu_data=data[(3*(i-1)+3)];
// duanzu_psr[duanzu_hao]=(duanzu_mode<<8)|duanzu_data;
// }
//break;
//
//
//case yellow_flash:
//
//break;
//
//
//case communication_successful:
//
//break;
//
//
//case operation_successful:
//
//break;
//
// }
//return 1;
//
//}
#endif /* fast driver */
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