resource_share1.msg

《设计与验证VerilogHDL》源码实例 和 Verilog规范

@TM:1141810746
@N:  :"":0:0:0:-1|Only System clock will be Autoconstrained
@N: FA174 :"":0:0:0:-1|The following device usage report estimates place and route data. Please look at the place and route report for final resource usage..
@N: MT195 :"":0:0:0:-1|This timing report estimates place and route data. Please look at the place and route timing report for final timing..
@N: MT197 :"":0:0:0:-1|Clock constraints cover only FF-to-FF paths associated with the clock..
@N: MT204 :"":0:0:0:-1|Autoconstrain Mode is ON
@TM:1141810974
@N:  :"c:\prj\chapter5\example-5-6\source\resource_share1.v":1:7:1:21|Synthesizing module resource_share1
@TM:1141810975
@N: FA112 :"c:\prj\chapter5\example-5-6\source\resource_share1.v":3:15:3:20|M