decoderbcd.vhd

many application on kit SP-3: VGA, digital clock, counter, interface PS2....

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity decoderbcd is
    Port ( I : in  STD_LOGIC_VECTOR (3 downto 0);
           segs : out  STD_LOGIC_VECTOR (7 downto 0));
end decoderbcd;

architecture Behavioral of decoderbcd is
begin
	with I select
		Segs <="11000000"	WHEN "0000"  ,
					"11111001"	WHEN "0001"  ,
					"10100100" 	WHEN "0010"  ,
					"10110000"  WHEN "0011"  ,
					"10011001" 	WHEN "0100"  ,
					"10010010" 	WHEN "0101"  ,
					"10000010" 	WHEN "0110"  ,
					"11111000" 	WHEN "0111"  ,
					"10000000" 	WHEN "1000"  ,
					"10010000" 	WHEN "1001"  ,
					"11000000" 	WHEN OTHERS  ;
end Behavioral;