counthand.vhd

many application on kit SP-3: VGA, digital clock, counter, interface PS2....

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity Counthand is
    Port ( SW1,SW0,SW2 : in  STD_LOGIC;
				cntpulse  :in  std_logic;
    		  BCD0,BCD1,BCD2,BCD3:out std_logic_VECTOR (3 downto 0));
end Counthand;

architecture Behavior of Counthand is
	signal cnt0,cnt1,cnt2 : std_logic_vector (3 downto 0);
	signal cnt3 : std_logic_vector (3 downto 0):="0000";
begin
	process(SW1,SW0,SW2,cntpulse)
	begin
		if SW1='1' and SW2='1' and SW0='1' then
			cnt0<="0000";
			cnt1<="0000";
			cnt2<="0000";
		elsif cntpulse'event and cntpulse ='1' then -- khi an nut thi dem
			if cnt0="1001" then	--dem 9	(hang don vi)
				cnt0<="0000";
				if cnt1="1001" then		--dem 9(hang chuc)
						cnt1<="0000";
						if cnt2="1001" then	--dem 9(hang tram)
								cnt2<="0000";									
						else
								cnt2<=cnt2 + '1';		
						end if;	--count2
				else
						cnt1<=cnt1 + '1';
				end if;	--count1
			else
				 cnt0 <= cnt0 + '1';
			end if;		--count0
		end if;			
		-- dieu kien reset lai bo dem la dem toi 100
		if cnt2="0001" and cnt1="0000" and cnt0="0001" then
			cnt0<="0000";
			cnt1<="0000";
			cnt2<="0000";
		end if;
	end process;
	bcd0<=cnt0;
	bcd1<=cnt1;
	bcd2<=cnt2;
	bcd3<=cnt3;
end Behavior;