debounce.vhd

来自「many application on kit SP-3: VGA, digit」· VHDL 代码 · 共 29 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all; -- use for da, comment out for actmap
use ieee.std_logic_arith.all;

entity debounce is
   port(clk,button : in std_logic;
      cntpulse : out std_logic );
end debounce;

architecture behavioural of debounce is
begin
   counter : process(button,clk)
      variable count : std_logic_vector(5 downto 0);
   begin
      if(button = '0') then
         count := "101000";   -- value 40 
         cntpulse <= '0';
      elsif(rising_edge(clk)) then
         if (count /= "000000") then
            count := count - '1';
            cntpulse <= '0';
         else
            cntpulse <= '1';
         end if;
      end if;
   end process counter;
end behavioural;