stdout.log

来自「vlsi UART referene, use UART0_3」· LOG 代码 · 共 46 行

Using OEM Licensing.

Starting:    C:\ISPTOOLS7_0\SYNPBASE\bin\mbin\synplify.exe
Install:     C:\ISPTOOLS7_0\SYNPBASE
Date:        Sat Mar 07 01:34:51 2009
Version:     8.8L2


Arguments:    -batch f:/new_uart/uart0_2/uart0_3\UART_R~1.PRJ
ProductType: synplify





Running synthesis on UART_R~1:uart0_3

log file: "F:\new_uart\uart0_2\uart0_3\uart_regs.log"


Running Verilog Compiler...

Verilog Compiler Completed


Total: 0 errors, 30 warnings, 12 notes


Running LATTICE-XP Mapper...

Option not allowed with current settings and will be ignored:  fixgatedclocks
Option not allowed with current settings and will be ignored:  fixgeneratedclocks

Option not allowed with current settings and will be ignored:  fixgatedclocks
Option not allowed with current settings and will be ignored:  fixgeneratedclocks

LATTICE-XP Mapper Completed with warnings


Total: 0 errors, 151 warnings, 23 notes


exit status=0