fmul.hif

本程序是11位带符号位的乘法器

Version 8.0 Build 215 05/29/2008 SJ Web Edition
11
2834
OFF
OFF
OFF
OFF
ON
ON
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
fmul
# storage
db|fmul.(0).cnf
db|fmul.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
mul11.vhd
3d993885669a1cc11815c9a5eb5e2d
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
|
}
# lmf
..|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
lpm_mult
# storage
db|fmul.(1).cnf
db|fmul.(1).cnf
# case_insensitive
# source_file
..|libraries|megafunctions|lpm_mult.tdf
4f175e2fceaaeb7ac40f0cbab8ee2
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTHA
4
PARAMETER_UNKNOWN
USR
LPM_WIDTHB
4
PARAMETER_UNKNOWN
USR
LPM_WIDTHP
8
PARAMETER_UNKNOWN
USR
LPM_WIDTHR
8
PARAMETER_UNKNOWN
USR
LPM_WIDTHS
1
PARAMETER_UNKNOWN
USR
LPM_REPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
LATENCY
0
PARAMETER_UNKNOWN
DEF
INPUT_A_IS_CONSTANT
NO
PARAMETER_UNKNOWN
USR
INPUT_B_IS_CONSTANT
NO
PARAMETER_UNKNOWN
USR
USE_EAB
OFF
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
APEX20K_TECHNOLOGY_MAPPER
LUT
TECH_MAPPER_APEX20K
USR
DEDICATED_MULTIPLIER_CIRCUITRY
AUTO
PARAMETER_UNKNOWN
USR
DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO
0
PARAMETER_UNKNOWN
DEF
DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO
0
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
mult_lq01
PARAMETER_UNKNOWN
USR
INPUT_A_FIXED_VALUE
Bx
PARAMETER_UNKNOWN
DEF
INPUT_B_FIXED_VALUE
Bx
PARAMETER_UNKNOWN
DEF
USE_AHDL_IMPLEMENTATION
OFF
PARAMETER_UNKNOWN
DEF
}
# used_port {
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
datab2
-1
3
datab1
-1
3
datab0
-1
3
dataa2
-1
3
dataa1
-1
3
dataa0
-1
3
datab3
-1
2
dataa3
-1
2
}
# include_file {
..|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
..|libraries|megafunctions|multcore.inc
13b7e8bee916e23c5f79837e9c670
..|libraries|megafunctions|aglobal80.inc
9274497d636e3ed37111b8c54bf938
..|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
..|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
}
# macro_sequence

# end
# entity
mult_lq01
# storage
db|fmul.(2).cnf
db|fmul.(2).cnf
# case_insensitive
# source_file
db|mult_lq01.tdf
afad1c37bdee2b1857daced81dd46e33
6
# used_port {
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result1
-1
3
result0
-1
3
datab3
-1
3
datab2
-1
3
datab1
-1
3
datab0
-1
3
dataa3
-1
3
dataa2
-1
3
dataa1
-1
3
dataa0
-1
3
}
# macro_sequence

# end
# complete