bit8_portout.fit.eqn

Source of Grabber Board

--B1_RegQ[7] is pout_component:I_portout|RegQ[7] at LC5_C13
--operation mode is normal

B1_RegQ[7]_lut_out = B1L8 # !nWR & !nCS & DIN[7];
B1_RegQ[7] = DFFEA(B1_RegQ[7]_lut_out, !GLOBAL(CLK), !GLOBAL(RESET), , , , );


--B1L81Q is pout_component:I_portout|SynchProc~0 at LC1_C15
--operation mode is normal

B1L81Q_lut_out = VCC;
B1L81Q = DFFEA(B1L81Q_lut_out, !GLOBAL(CLK), !GLOBAL(RESET), , , , );


--B1_RegQ[6] is pout_component:I_portout|RegQ[6] at LC3_C13
--operation mode is normal

B1_RegQ[6]_lut_out = B1L7 # !nWR & !nCS & DIN[6];
B1_RegQ[6] = DFFEA(B1_RegQ[6]_lut_out, !GLOBAL(CLK), !GLOBAL(RESET), , , , );


--B1_RegQ[5] is pout_component:I_portout|RegQ[5] at LC7_C13
--operation mode is normal

B1_RegQ[5]_lut_out = B1L6 # !nWR & !nCS & DIN[5];
B1_RegQ[5] = DFFEA(B1_RegQ[5]_lut_out, !GLOBAL(CLK), !GLOBAL(RESET), , , , );


--B1_RegQ[4] is pout_component:I_portout|RegQ[4] at LC1_C13
--operation mode is normal

B1_RegQ[4]_lut_out = B1L5 # !nWR & !nCS & DIN[4];
B1_RegQ[4] = DFFEA(B1_RegQ[4]_lut_out, !GLOBAL(CLK), !GLOBAL(RESET), , , , );


--B1_RegQ[3] is pout_component:I_portout|RegQ[3] at LC4_C14
--operation mode is normal

B1_RegQ[3]_lut_out = B1L4 # !nWR & !nCS & DIN[3];
B1_RegQ[3] = DFFEA(B1_RegQ[3]_lut_out, !GLOBAL(CLK), !GLOBAL(RESET), , , , );


--B1_RegQ[2] is pout_component:I_portout|RegQ[2] at LC6_C14
--operation mode is normal

B1_RegQ[2]_lut_out = B1L3 # !nWR & !nCS & DIN[2];
B1_RegQ[2] = DFFEA(B1_RegQ[2]_lut_out, !GLOBAL(CLK), !GLOBAL(RESET), , , , );


--B1_RegQ[1] is pout_component:I_portout|RegQ[1] at LC3_C14
--operation mode is normal

B1_RegQ[1]_lut_out = B1L2 # !nWR & !nCS & DIN[1];
B1_RegQ[1] = DFFEA(B1_RegQ[1]_lut_out, !GLOBAL(CLK), !GLOBAL(RESET), , , , );


--B1_RegQ[0] is pout_component:I_portout|RegQ[0] at LC2_C14
--operation mode is normal

B1_RegQ[0]_lut_out = B1L1 # !nWR & !nCS & DIN[0];
B1_RegQ[0] = DFFEA(B1_RegQ[0]_lut_out, !GLOBAL(CLK), !GLOBAL(RESET), , , , );


--B1L8 is pout_component:I_portout|RegD[7]~656 at LC2_C13
--operation mode is normal

B1L8 = B1L81Q & B1_RegQ[7] & (nWR # nCS) # !B1L81Q & (nWR # nCS);


--B1L7 is pout_component:I_portout|RegD[6]~658 at LC4_C13
--operation mode is normal

B1L7 = B1L81Q & B1_RegQ[6] & (nWR # nCS) # !B1L81Q & (nWR # nCS);


--B1L6 is pout_component:I_portout|RegD[5]~660 at LC6_C13
--operation mode is normal

B1L6 = B1L81Q & B1_RegQ[5] & (nWR # nCS) # !B1L81Q & (nWR # nCS);


--B1L5 is pout_component:I_portout|RegD[4]~662 at LC8_C13
--operation mode is normal

B1L5 = B1L81Q & B1_RegQ[4] & (nWR # nCS) # !B1L81Q & (nWR # nCS);


--B1L4 is pout_component:I_portout|RegD[3]~664 at LC1_C14
--operation mode is normal

B1L4 = B1L81Q & B1_RegQ[3] & (nWR # nCS) # !B1L81Q & (nWR # nCS);


--B1L3 is pout_component:I_portout|RegD[2]~666 at LC5_C14
--operation mode is normal

B1L3 = B1L81Q & B1_RegQ[2] & (nWR # nCS) # !B1L81Q & (nWR # nCS);


--B1L2 is pout_component:I_portout|RegD[1]~668 at LC7_C14
--operation mode is normal

B1L2 = B1L81Q & B1_RegQ[1] & (nWR # nCS) # !B1L81Q & (nWR # nCS);


--B1L1 is pout_component:I_portout|RegD[0]~670 at LC8_C14
--operation mode is normal

B1L1 = B1L81Q & B1_RegQ[0] & (nWR # nCS) # !B1L81Q & (nWR # nCS);


--nCS is nCS at PIN_2
--operation mode is input

nCS = INPUT();


--nWR is nWR at PIN_44
--operation mode is input

nWR = INPUT();


--DIN[7] is DIN[7] at PIN_42
--operation mode is input

DIN[7] = INPUT();


--CLK is CLK at PIN_43
--operation mode is input

CLK = INPUT();


--RESET is RESET at PIN_84
--operation mode is input

RESET = INPUT();


--DIN[6] is DIN[6] at PIN_1
--operation mode is input

DIN[6] = INPUT();


--DIN[5] is DIN[5] at PIN_27
--operation mode is input

DIN[5] = INPUT();


--DIN[4] is DIN[4] at PIN_62
--operation mode is input

DIN[4] = INPUT();


--DIN[3] is DIN[3] at PIN_30
--operation mode is input

DIN[3] = INPUT();


--DIN[2] is DIN[2] at PIN_60
--operation mode is input

DIN[2] = INPUT();


--DIN[1] is DIN[1] at PIN_29
--operation mode is input

DIN[1] = INPUT();


--DIN[0] is DIN[0] at PIN_28
--operation mode is input

DIN[0] = INPUT();


--P0UT[7] is P0UT[7] at PIN_59
--operation mode is output

P0UT[7]_tri_out = TRI(B1_RegQ[7], B1L81Q);
P0UT[7] = OUTPUT(P0UT[7]_tri_out);


--P0UT[6] is P0UT[6] at PIN_61
--operation mode is output

P0UT[6]_tri_out = TRI(B1_RegQ[6], B1L81Q);
P0UT[6] = OUTPUT(P0UT[6]_tri_out);


--P0UT[5] is P0UT[5] at PIN_64
--operation mode is output

P0UT[5]_tri_out = TRI(B1_RegQ[5], B1L81Q);
P0UT[5] = OUTPUT(P0UT[5]_tri_out);


--P0UT[4] is P0UT[4] at PIN_83
--operation mode is output

P0UT[4]_tri_out = TRI(B1_RegQ[4], B1L81Q);
P0UT[4] = OUTPUT(P0UT[4]_tri_out);


--P0UT[3] is P0UT[3] at PIN_71
--operation mode is output

P0UT[3]_tri_out = TRI(B1_RegQ[3], B1L81Q);
P0UT[3] = OUTPUT(P0UT[3]_tri_out);


--P0UT[2] is P0UT[2] at PIN_58
--operation mode is output

P0UT[2]_tri_out = TRI(B1_RegQ[2], B1L81Q);
P0UT[2] = OUTPUT(P0UT[2]_tri_out);


--P0UT[1] is P0UT[1] at PIN_47
--operation mode is output

P0UT[1]_tri_out = TRI(B1_RegQ[1], B1L81Q);
P0UT[1] = OUTPUT(P0UT[1]_tri_out);


--P0UT[0] is P0UT[0] at PIN_22
--operation mode is output

P0UT[0]_tri_out = TRI(B1_RegQ[0], B1L81Q);
P0UT[0] = OUTPUT(P0UT[0]_tri_out);