graber.tan.qmsg

Source of Grabber Board

{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "H1 " "Info: Assuming node \"H1\" is an undefined clock" {  } { { "graber.bdf" "" { Schematic "C:/Documents and Settings/Administrator/官帕 拳搁/凉累包访/厚陵倔 飘饭侨/橇肺弊伐/家胶/VHDL/graber.bdf" { { 24 552 720 40 "H1" "" } { 1384 160 256 1400 "H1" "" } { 984 912 976 1000 "H1" "" } } } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "H1" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0} { "Info" "ITAN_NODE_MAP_TO_CLK" "LLC2 " "Info: Assuming node \"LLC2\" is an undefined clock" {  } { { "graber.bdf" "" { Schematic "C:/Documents and Settings/Administrator/官帕 拳搁/凉累包访/厚陵倔 飘饭侨/橇肺弊伐/家胶/VHDL/graber.bdf" { { 392 1480 1648 408 "LLC2" "" } { 384 1648 1792 400 "LLC2" "" } } } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "LLC2" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}