📄 clock.bdf

📁 Source of Grabber Board
💻 BDF
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上一页 12
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(text "10 MHz" (rect 536 16 578 30)(font "Arial" (font_size 8)))
(text "5 MHz" (rect 480 344 515 358)(font "Arial" (font_size 8)))
(text "2.5 MHz" (rect 536 368 582 382)(font "Arial" (font_size 8)))
(text "156.25 kHz" (rect 536 600 599 614)(font "Arial" (font_size 8)))
(text "625000Hz" (rect 496 400 553 414)(font "Arial" (font_size 8)))
(text "39062.5Hz" (rect 464 688 525 702)(font "Arial" (font_size 8)))
(text "2441.4Hz" (rect 688 712 742 726)(font "Arial" (font_size 8)))
(text "152.5879Hz" (rect 680 904 748 918)(font "Arial" (font_size 8)))
(text "9.5367Hz" (rect 688 1080 742 1094)(font "Arial" (font_size 8)))
(text "2.3841Hz" (rect 696 1184 750 1198)(font "Arial" (font_size 8)))
(text "1.192Hz" (rect 696 1200 743 1214)(font "Arial" (font_size 8)))
(text "0.5960Hz" (rect 696 1216 750 1230)(font "Arial" (font_size 8)))
上一页 12
💿 文件大小 561 K
👤 上传用户 dongjunxi126
📂 所属分类 VHDL/FPGA/Verilog
🏷️ 相关标签

#Grabber #Source #Board #of
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