📄 in8031.vhd
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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity in8031 is
end in8031;
architecture in8031 of in8031 is
constant clk_cy :time := 2 ns;
signal clk,rst:std_logic;
begin
p1:process
begin
wait for 1 ns;
clk<='0';
wait for 1 ns;
clk<='1';
end process p1;
p2:process
begin
wait for 24 ns;
rst<='1';
rst<='0';
wait;
end process p2;
end;
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