📄 top.map.eqn
字号:
--L1_mh[2] is all_count:u2|minute:u2|mh[2]
L1_mh[2]_p1_out = L1_mh[1] & L1L6 & L1L7 & L1_mh[0] & L1L8 & N2_dffs[0] & !N2_dffs[1] & !N2_dffs[2] & N2_dffs[3];
L1_mh[2]_p2_out = L1L6 & L1L7 & L1_mh[0] & L1L8 & N2_dffs[0] & !N2_dffs[1] & !N2_dffs[2] & N2_dffs[3] & L1_mh[2];
L1_mh[2]_or_out = L1_mh[2]_p1_out # L1_mh[2]_p2_out;
L1_mh[2]_reg_input = L1_mh[2]_or_out;
L1_mh[2]_p3_out = C1L11 & C1L21 & C1L31 & C1L41;
L1_mh[2] = TFFE(L1_mh[2]_reg_input, L1_mh[2]_p3_out, , , );
--L1L2 is all_count:u2|minute:u2|count_temp~23
L1L2 = EXP(!B1_st[2] & B1_st[1] & !B1_st[0]);
--L1_count_temp is all_count:u2|minute:u2|count_temp
L1_count_temp_p0_out = B1_st[0] & !B1_st[2] & L1_count_temp;
L1_count_temp_p1_out = !L1_mh[1] & L1_mh[2] & L1_mh[0] & !N2_dffs[0] & !N2_dffs[1] & !N2_dffs[2] & N2_dffs[3] & B1_st[1] & !B1_st[0] & !B1_st[2];
L1_count_temp_p2_out = L1L2 & !K1_count_temp & L1_count_temp;
L1_count_temp_p4_out = !L1_mh[1] & L1_mh[2] & L1_mh[0] & !N2_dffs[0] & !N2_dffs[1] & !N2_dffs[2] & N2_dffs[3] & K1_count_temp & L1L8;
L1_count_temp_or_out = L1_count_temp_p0_out # L1_count_temp_p1_out # L1_count_temp_p2_out # L1_count_temp_p4_out;
L1_count_temp_reg_input = L1_count_temp_or_out;
L1_count_temp_p3_out = C1L11 & C1L21 & C1L31 & C1L41;
L1_count_temp = DFFE(L1_count_temp_reg_input, L1_count_temp_p3_out, , , );
--N3_dffs[0] is all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[0]
N3_dffs[0]_p1_out = L1_count_temp & K1_count_temp & B1_st[2];
N3_dffs[0]_p2_out = L1_count_temp & K1_count_temp & !B1_st[1] & !B1_st[0];
N3_dffs[0]_p4_out = !B1_st[2] & B1_st[1] & B1_st[0];
N3_dffs[0]_or_out = N3_dffs[0]_p1_out # N3_dffs[0]_p2_out # N3_dffs[0]_p4_out;
N3_dffs[0]_reg_input = N3_dffs[0]_or_out;
N3_dffs[0]_p3_out = C1L11 & C1L21 & C1L31 & C1L41;
N3_dffs[0] = TFFE(N3_dffs[0]_reg_input, N3_dffs[0]_p3_out, , , );
--N3_dffs[2] is all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[2]
N3_dffs[2]_p1_out = !B1_st[2] & B1_st[1] & !B1_st[0];
N3_dffs[2]_p2_out = !B1_st[2] & !B1_st[1] & B1_st[0];
N3_dffs[2]_or_out = N3L6 # !N3_dffs[0] # N3_dffs[2]_p1_out # N3_dffs[2]_p2_out # !N3_dffs[1];
N3_dffs[2]_reg_input = !N3_dffs[2]_or_out;
N3_dffs[2]_p3_out = C1L11 & C1L21 & C1L31 & C1L41;
N3_dffs[2] = TFFE(N3_dffs[2]_reg_input, N3_dffs[2]_p3_out, , , );
--N3_dffs[3] is all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[3]
N3_dffs[3]_p0_out = N3_dffs[2] & !B1_st[1] & N3_dffs[1] & N3_dffs[0] & L1_count_temp & !B1_st[0] & K1_count_temp;
N3_dffs[3]_p1_out = M1_hh[0] & !N3_dffs[2] & !B1_st[1] & !N3_dffs[1] & N3_dffs[0] & L1_count_temp & N3_dffs[3] & !B1_st[0] & K1_count_temp;
N3_dffs[3]_p2_out = N3_dffs[2] & B1_st[1] & N3_dffs[1] & N3_dffs[0] & B1_st[0] & !B1_st[2];
N3_dffs[3]_p4_out = N3_dffs[2] & N3_dffs[1] & N3_dffs[0] & L1_count_temp & K1_count_temp & B1_st[2];
N3_dffs[3]_or_out = N3L8 # N3_dffs[3]_p0_out # N3_dffs[3]_p1_out # N3_dffs[3]_p2_out # N3_dffs[3]_p4_out;
N3_dffs[3]_reg_input = N3_dffs[3]_or_out;
N3_dffs[3]_p3_out = C1L11 & C1L21 & C1L31 & C1L41;
N3_dffs[3] = TFFE(N3_dffs[3]_reg_input, N3_dffs[3]_p3_out, , , );
--N3_dffs[1] is all_count:u2|hour:u3|lpm_counter:hl_rtl_0|dffs[1]
N3_dffs[1]_p0_out = B1_st[0] & !B1_st[2] & !B1_st[1];
N3_dffs[1]_p1_out = !L1_count_temp & !B1_st[0];
N3_dffs[1]_p2_out = !B1_st[0] & !K1_count_temp;
N3_dffs[1]_p4_out = !B1_st[0] & !B1_st[2] & B1_st[1];
N3_dffs[1]_or_out = N3L4 # N3_dffs[1]_p0_out # N3_dffs[1]_p1_out # N3_dffs[1]_p2_out # N3_dffs[1]_p4_out;
N3_dffs[1]_reg_input = !N3_dffs[1]_or_out;
N3_dffs[1]_p3_out = C1L11 & C1L21 & C1L31 & C1L41;
N3_dffs[1] = TFFE(N3_dffs[1]_reg_input, N3_dffs[1]_p3_out, , , );
--M1_hh[1] is all_count:u2|hour:u3|hh[1]
M1_hh[1]_p0_out = !N3_dffs[2] & !N3_dffs[1] & N3_dffs[0] & M1_hh[0] & N3_dffs[3] & !B1_st[2] & B1_st[1] & B1_st[0];
M1_hh[1]_p1_out = !N3_dffs[2] & N3_dffs[1] & N3_dffs[0] & !M1_hh[0] & !N3_dffs[3] & !B1_st[2] & B1_st[1] & B1_st[0] & M1_hh[1];
M1_hh[1]_p2_out = !N3_dffs[2] & !N3_dffs[1] & N3_dffs[0] & M1_hh[0] & N3_dffs[3] & B1_st[2] & L1_count_temp & K1_count_temp;
M1_hh[1]_p4_out = !N3_dffs[2] & !N3_dffs[1] & N3_dffs[0] & M1_hh[0] & N3_dffs[3] & !B1_st[1] & !B1_st[0] & L1_count_temp & K1_count_temp;
M1_hh[1]_or_out = M1L5 # M1_hh[1]_p0_out # M1_hh[1]_p1_out # M1_hh[1]_p2_out # M1_hh[1]_p4_out;
M1_hh[1]_reg_input = M1_hh[1]_or_out;
M1_hh[1]_p3_out = C1L11 & C1L21 & C1L31 & C1L41;
M1_hh[1] = TFFE(M1_hh[1]_reg_input, M1_hh[1]_p3_out, , , );
--M1_hh[0] is all_count:u2|hour:u3|hh[0]
M1_hh[0]_p0_out = !N3_dffs[2] & !N3_dffs[1] & N3_dffs[0] & N3_dffs[3] & !B1_st[2] & B1_st[1] & B1_st[0] & M1_hh[0];
M1_hh[0]_p1_out = !M1_hh[1] & !N3_dffs[2] & !N3_dffs[1] & N3_dffs[0] & N3_dffs[3] & !B1_st[2] & B1_st[1] & B1_st[0];
M1_hh[0]_p2_out = !N3_dffs[2] & !N3_dffs[1] & N3_dffs[0] & N3_dffs[3] & B1_st[2] & L1_count_temp & K1_count_temp & M1_hh[0];
M1_hh[0]_p4_out = !N3_dffs[2] & !N3_dffs[1] & N3_dffs[0] & N3_dffs[3] & !B1_st[1] & !B1_st[0] & L1_count_temp & K1_count_temp & M1_hh[0];
M1_hh[0]_or_out = M1L3 # M1_hh[0]_p0_out # M1_hh[0]_p1_out # M1_hh[0]_p2_out # M1_hh[0]_p4_out;
M1_hh[0]_reg_input = M1_hh[0]_or_out;
M1_hh[0]_p3_out = C1L11 & C1L21 & C1L31 & C1L41;
M1_hh[0] = TFFE(M1_hh[0]_reg_input, M1_hh[0]_p3_out, , , );
--A1L2 is am_pm~203
A1L2 = EXP(!M1_hh[0] & B1_st[2] & !B1_st[0] & !B1_st[1]);
--A1L3 is am_pm~204
A1L3 = EXP(B1_st[2] & !B1_st[0] & !B1_st[1]);
--A1L4 is am_pm~208
A1L4_p1_out = !M1_hh[1] & !M1_hh[0];
A1L4_p2_out = A1L2 & !N3_dffs[1] & !N3_dffs[3] & !N3_dffs[2];
A1L4_p3_out = !N3_dffs[3] & !N3_dffs[2] & A1L3 & !N3_dffs[0];
A1L4_or_out = A1L4_p1_out # A1L4_p2_out # A1L4_p3_out;
A1L4 = A1L4_or_out;
--C1L6 is all_count:u2|bell_count~180
C1L6 = EXP(!C1L51 & !C1L61 & !C1L71);
--C1L51 is all_count:u2|p2~272
C1L51_p0_out = !N1_dffs[2] & !N1_dffs[3] & N4_dffs[3];
C1L51_p1_out = N1_dffs[1] & N1_dffs[2] & N1_dffs[3] & N4_dffs[3];
C1L51_p2_out = !N1_dffs[1] & N1_dffs[3] & !N4_dffs[3];
C1L51_p3_out = !N1_dffs[1] & !N1_dffs[3] & N4_dffs[3];
C1L51_p4_out = !N1_dffs[2] & N1_dffs[3] & !N4_dffs[3];
C1L51_or_out = C1L02 # C1L51_p0_out # C1L51_p1_out # C1L51_p2_out # C1L51_p3_out # C1L51_p4_out;
C1L51 = C1L51_or_out;
--C1L61 is all_count:u2|p2~278
C1L61_p0_out = !K2_sh[0] & K1_sh[0];
C1L61_p1_out = !L2_mh[0] & L1_mh[0];
C1L61_p2_out = N5_dffs[0] & !N2_dffs[0];
C1L61_p3_out = !N5_dffs[0] & N2_dffs[0];
C1L61_p4_out = K2_sh[0] & !K1_sh[0];
C1L61_or_out = C1L22 # C1L61_p0_out # C1L61_p1_out # C1L61_p2_out # C1L61_p3_out # C1L61_p4_out;
C1L61 = C1L61_or_out;
--C1L71 is all_count:u2|p2~284
C1L71_p0_out = !N3_dffs[0] & N6_dffs[0];
C1L71_p1_out = !N4_dffs[0] & N1_dffs[0];
C1L71_p2_out = L2_mh[1] & !L1_mh[1];
C1L71_p3_out = !L2_mh[1] & L1_mh[1];
C1L71_p4_out = N3_dffs[0] & !N6_dffs[0];
C1L71_or_out = C1L52 # C1L71_p0_out # C1L71_p1_out # C1L71_p2_out # C1L71_p3_out # C1L71_p4_out;
C1L71 = C1L71_or_out;
--C1L62 is all_count:u2|reduce_nor~44
C1L62_p1_out = !C1_bell_count[1] & !C1_bell_count[0];
C1L62_p2_out = !C1_bell_count[0] & !C1_bell_count[3];
C1L62_p3_out = !C1_bell_count[0] & C1_bell_count[2];
C1L62_or_out = C1L62_p1_out # C1L62_p2_out # C1L62_p3_out;
C1L62 = C1L62_or_out;
--C1_bell_count[0] is all_count:u2|bell_count[0]
C1_bell_count[0]_p1_out = !C1_bell_count[3] & over_key;
C1_bell_count[0]_p2_out = over_key & !C1_bell_count[2] & !C1_bell_count[1];
C1_bell_count[0]_p4_out = C1L6 & C1L62;
C1_bell_count[0]_or_out = C1_bell_count[0]_p1_out # C1_bell_count[0]_p2_out # C1_bell_count[0]_p4_out;
C1_bell_count[0]_reg_input = C1_bell_count[0]_or_out;
C1_bell_count[0] = DFFE(C1_bell_count[0]_reg_input, B1_clk_1HZ_temp, , , );
--C1L7 is all_count:u2|bell_count~187
C1L7 = EXP(!C1_bell_count[3] & over_key);
--C1_bell_count[1] is all_count:u2|bell_count[1]
C1_bell_count[1]_p1_out = C1L6 & C1_bell_count[2] & C1_bell_count[3] & !C1_bell_count[1] & C1_bell_count[0];
C1_bell_count[1]_p2_out = C1L6 & !C1_bell_count[1] & C1_bell_count[0] & !over_key;
C1_bell_count[1]_p4_out = C1L6 & C1_bell_count[1] & !C1_bell_count[0] & C1L7;
C1_bell_count[1]_or_out = C1_bell_count[1]_p1_out # C1_bell_count[1]_p2_out # C1_bell_count[1]_p4_out;
C1_bell_count[1]_reg_input = C1_bell_count[1]_or_out;
C1_bell_count[1] = DFFE(C1_bell_count[1]_reg_input, B1_clk_1HZ_temp, , , );
--D1L9 is display:u4|count~10392
D1L9 = EXP(B1_st[2] & !B1_st[0] & !B1_st[1] & !N3_dffs[2] & !N3_dffs[1]);
--D1_count[3] is display:u4|count[3]
D1_count[3]_p0_out = !D1_\p1:circle[1] & D1_\p1:circle[2] & !D1_\p1:circle[0] & !E1L1 & D1L9 & N3_dffs[3];
D1_count[3]_p1_out = N2_dffs[3] & D1_\p1:circle[1] & !D1_\p1:circle[2] & !D1_\p1:circle[0] & !E1L1;
D1_count[3]_p2_out = !D1_\p1:circle[1] & !D1_\p1:circle[2] & !D1_\p1:circle[0] & E1L1 & N4_dffs[3];
D1_count[3]_p4_out = !D1_\p1:circle[1] & !D1_\p1:circle[2] & !D1_\p1:circle[0] & !E1L1 & N1_dffs[3];
D1_count[3]_or_out = D1L31 # D1_count[3]_p0_out # D1_count[3]_p1_out # D1_count[3]_p2_out # D1_count[3]_p4_out;
D1_count[3]_reg_input = D1_count[3]_or_out;
D1_count[3] = DFFE(D1_count[3]_reg_input, B1_clk_1K_temp, , , );
--D1L01 is display:u4|count~10401
D1L01 = EXP(!M1_hh[1] & !M1_hh[0]);
--D1L11 is display:u4|count~10402
D1L11 = EXP(!N3_dffs[3] & !N3_dffs[2]);
--D1_count[1] is display:u4|count[1]
D1_count[1]_p0_out = !D1_\p1:circle[1] & D1_\p1:circle[2] & !D1_\p1:circle[0] & !E1L1 & !N3_dffs[1] & D1L11 & D1L01 & B1_st[2] & !B1_st[0] & !B1_st[1];
D1_count[1]_p1_out = !D1_\p1:circle[1] & !D1_\p1:circle[2] & !D1_\p1:circle[0] & !E1L1 & N1_dffs[1];
D1_count[1]_p2_out = !D1_\p1:circle[1] & D1_\p1:circle[2] & D1_\p1:circle[0] & !E1L1 & A1L2 & M1_hh[1];
D1_count[1]_p4_out = !D1_\p1:circle[1] & D1_\p1:circle[2] & !D1_\p1:circle[0] & !E1L1 & A1L3 & N3_dffs[1];
D1_count[1]_or_out = D1L61 # D1_count[1]_p0_out # D1_count[1]_p1_out # D1_count[1]_p2_out # D1_count[1]_p4_out;
D1_count[1]_reg_input = D1_count[1]_or_out;
D1_count[1] = DFFE(D1_count[1]_reg_input, B1_clk_1K_temp, , , );
--C1L8 is all_count:u2|bell_count~194
C1L8 = EXP(C1_bell_count[1] & C1_bell_count[0]);
--C1_bell_count[2] is all_count:u2|bell_count[2]
C1_bell_count[2]_p1_out = C1L7 & C1L6 & C1_bell_count[1] & !C1_bell_count[2] & C1_bell_count[0];
C1_bell_count[2]_p2_out = C1L7 & C1L6 & C1_bell_count[2] & C1L8;
C1_bell_count[2]_or_out = C1_bell_count[2]_p1_out # C1_bell_count[2]_p2_out;
C1_bell_count[2]_reg_input = C1_bell_count[2]_or_out;
C1_bell_count[2] = DFFE(C1_bell_count[2]_reg_input, B1_clk_1HZ_temp, , , );
--D1L21 is display:u4|count~10409
D1L21 = EXP(!N3_dffs[1] & B1_st[2] & !B1_st[0] & !B1_st[1]);
--D1_count[2] is display:u4|count[2]
D1_count[2]_p0_out = !D1_\p1:circle[1] & D1_\p1:circle[2] & !D1_\p1:circle[0] & !E1L1 & !N3_dffs[2] & D1L01 & N3_dffs[3] & !N3_dffs[1] & B1_st[2] & !B1_st[0] & !B1_st[1];
D1_count[2]_p1_out = !D1_\p1:circle[1] & !D1_\p1:circle[2] & !D1_\p1:circle[0] & E1L1 & N4_dffs[2];
D1_count[2]_p2_out = !D1_\p1:circle[1] & !D1_\p1:circle[2] & !D1_\p1:circle[0] & !E1L1 & N1_dffs[2];
D1_count[2]_p4_out = !D1_\p1:circle[1] & D1_\p1:circle[2] & !D1_\p1:circle[0] & !E1L1 & D1L21 & N3_dffs[2];
D1_count[2]_or_out = D1L81 # D1_count[2]_p0_out # D1_count[2]_p1_out # D1_count[2]_p2_out # D1_count[2]_p4_out;
D1_count[2]_reg_input = D1_count[2]_or_out;
D1_count[2] = DFFE(D1_count[2]_reg_input, B1_clk_1K_temp, , , );
--D1_count[0] is display:u4|count[0]
D1_count[0]_p0_out = !D1_\p1:circle[1] & !D1_\p1:circle[2] & !D1_\p1:circle[0] & !E1L1 & N1_dffs[0];
D1_count[0]_p1_out = K2_sh[0] & !D1_\p1:circle[1] & !D1_\p1:circle[2] & D1_\p1:circle[0] & E1L1;
D1_count[0]_p2_out = !D1_\p1:circle[1] & !D1_\p1:circle[2] & D1_\p1:circle[0] & !E1L1 & K1_sh[0];
D1_count[0]_p4_out = !D1_\p1:circle[1] & !D1_\p1:circle[2] & !D1_\p1:circle[0] & E1L1 & N4_dffs[0];
D1_count[0]_or_out = D1L12 # D1_count[0]_p0_out # D1_count[0]_p1_out # D1_count[0]_p2_out # D1_count[0]_p4_out;
D1_count[0]_reg_input = D1_count[0]_or_out;
D1_count[0] = DFFE(D1_count[0]_reg_input, B1_clk_1K_temp, , , );
--D1L62 is display:u4|seg_show[4]~518
D1L62_p1_out = !D1_count[0] & D1_count[1] & !D1_count[2];
D1L62_or_out = D1L62_p1_out;
D1L62 = !(D1L62_or_out);
--D1L42 is display:u4|seg_show[2]~521
D1L42_p1_out = !D1_count[1] & D1_count[2];
D1L42_or_out = D1L42_p1_out # D1_count[0];
D1L42 = !(D1L42_or_out);
--D1L82 is display:u4|seg_show[6]~526
D1L82_p1_out = D1_count[0] & !D1_count[2] & !D1_count[3] & !D1_count[1];
D1L82_p2_out = !D1_count[0] & D1_count[2] & !D1_count[3] & !D1_count[1];
D1L82_or_out = D1L82_p1_out # D1L82_p2_out;
D1L82 = !(D1L82_or_out);
--D1L72 is display:u4|seg_show[5]~530
D1L72_p1_out = !D1_count[1] & !D1_count[0];
D1L72_p2_out = D1_count[1] & D1_count[0];
D1L72_or_out = D1L72_p1_out # D1L72_p2_out # !D1_count[2];
D1L72 = D1L72_or_out;
--D1L52 is display:u4|seg_show[3]~535
D1L52_p1_out = !D1_count[3] & !D1_count[0] & !D1_count[1] & D1_count[2];
D1L52_p2_out = !D1_count[3] & D1_count[0] & !D1_count[1] & !D1_count[2];
D1L52_p3_out = !D1_count[3] & D1_count[0] & D1_count[1] & D1_count[2];
D1L52_or_out = D1L52_p1_out # D1L52_p2_out # D1L52_p3_out;
D1L52 = !(D1L52_or_out);
--D1L32 is display:u4|seg_show[1]~540
D1L32_p1_out = D1_count[1] & !D1_count[3] & !D1_count[2];
D1L32_p2_out = D1_count[1] & !D1_count[3] & D1_count[0];
D1L32_p3_out = !D1_count[3] & !D1_count[2] & D1_count[0];
D1L32_or_out = D1L32_p1_out # D1L32_p2_out # D1L32_p3_out;
D1L32 = !(D1L32_or_out);
--D1L22 is display:u4|seg_show[0]~545
D1L22_p1_out = !D1_count[0] & D1_count[1];
D1L22_p2_out = D1_count[1] & !D1_count[2];
D1L22_p3_out = !D1_count[1] & D1_count[2];
D1L22_or_out = D1L22_p1_out # D1L22_p2_out # D1L22_p3_out # D1_count[3];
D1L22 = D1L22_or_out;
--C1L9 is all_count:u2|bell_count~200
C1L9 = EXP(C1_bell_count[2] & C1_bell_count[1] & C1_bell_count[0]);
--C1_bell_count[3] is all_count:u2|bell_count[3]
C1_bell_count[3]_p0_out = C1_bell_count[3] & C1L6 & C1L9;
C1_bell_count[3]_p1_out = over_key & !C1_bell_count[3];
C1_bell_count[3]_p2_out = over_key & !C1_bell_count[2] & !C1_bell_count[1];
C1_bell_count[3]_p4_out = !C1_bell_count[3] & C1_bell_count[2] & C1_bell_count[1] & C1L6 & C1_bell_count[0];
C1_bell_count[3]_or_out = C1_bell_count[3]_p0_out # C1_bell_count[3]_p1_out # C1_bell_count[3]_p2_out # C1_bell_count[3]_p4_out;
C1_bell_count[3]_reg_input = C1_bell_count[3]_or_out;
C1_bell_count[3] = DFFE(C1_bell_count[3]_reg_input, B1_clk_1HZ_temp, , , );
--C1_bell_out is all_count:u2|bell_out
C1_bell_out_p1_out = !C1_bell_count[2] & !C1_bell_count[1];
C1_bell_out_or_out = C1_bell_out_p1_out # !C1_bell_count[3];
C1_bell_out_reg_input = C1_bell_out_or_out;
C1_bell_out = DFFE(C1_bell_out_reg_input, B1_clk_1HZ_temp, , , );
--A1L62 is sound_out~24
A1L62_p1_out = B1_st[2] & L1_count_temp & K1_count_temp;
A1L62_p2_out = L1_count_temp & K1_count_temp & !B1_st[1] & !B1_st[0];
A1L62_or_out = A1L62_p1_out # A1L62_p2_out # C1_bell_out;
A1L62 = A1L62_or_out;
--N2L4 is all_count:u2|minute:u2|lpm_counter:ml_rtl_3|dffs[1]~209
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -