y_blk.vhd

来自「Divisor do Tipo com restaura莽茫o sequenci」· VHDL 代码 · 共 25 行

library divisor ;
use divisor.pkg_divisor.soma ;

entity y_blk is
   
       PORT ( bi, ci, ri : in bit ;
				         ci1 : out bit ) ;		
	
end y_blk;

architecture Behavioral of y_blk is

begin


 SUM : soma PORT MAP ( a => ri,  b => bi,
                      ve => ci, vs => ci1, 
							  s => OPEN ) ;

 


end Behavioral;