fifo1.fit.qmsg

学习UART知识

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Jun 09 09:54:22 2007 " "Info: Processing started: Sat Jun 09 09:54:22 2007" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off fifo1 -c fifo1 " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off fifo1 -c fifo1" {  } {  } 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "fifo1 EP1C3T144C8 " "Info: Selected device EP1C3T144C8 for design \"fifo1\"" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP1C6T144C8 " "Info: Device EP1C6T144C8 is compatible" {  } {  } 2}  } {  } 2}
{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "30 30 " "Info: No exact pin location assignment(s) for 30 pins of 30 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "q\[0\] " "Info: Pin q\[0\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 47 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "q\[0\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { q[0] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { q[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "q\[1\] " "Info: Pin q\[1\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 47 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "q\[1\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { q[1] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { q[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "q\[2\] " "Info: Pin q\[2\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 47 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "q\[2\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { q[2] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { q[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "q\[3\] " "Info: Pin q\[3\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 47 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "q\[3\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { q[3] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { q[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "q\[4\] " "Info: Pin q\[4\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 47 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "q\[4\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { q[4] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { q[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "q\[5\] " "Info: Pin q\[5\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 47 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "q\[5\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { q[5] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { q[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "q\[6\] " "Info: Pin q\[6\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 47 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "q\[6\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { q[6] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { q[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "q\[7\] " "Info: Pin q\[7\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 47 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "q\[7\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { q[7] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { q[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "full " "Info: Pin full not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 48 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "full" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { full } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { full } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "empty " "Info: Pin empty not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 49 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "empty" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { empty } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { empty } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "usedw\[0\] " "Info: Pin usedw\[0\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 50 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "usedw\[0\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { usedw[0] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { usedw[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "usedw\[1\] " "Info: Pin usedw\[1\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 50 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "usedw\[1\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { usedw[1] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { usedw[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "usedw\[2\] " "Info: Pin usedw\[2\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 50 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "usedw\[2\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { usedw[2] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { usedw[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "usedw\[3\] " "Info: Pin usedw\[3\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 50 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "usedw\[3\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { usedw[3] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { usedw[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "usedw\[4\] " "Info: Pin usedw\[4\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 50 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "usedw\[4\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { usedw[4] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { usedw[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "usedw\[5\] " "Info: Pin usedw\[5\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 50 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "usedw\[5\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { usedw[5] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { usedw[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "usedw\[6\] " "Info: Pin usedw\[6\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 50 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "usedw\[6\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { usedw[6] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { usedw[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "usedw\[7\] " "Info: Pin usedw\[7\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 50 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "usedw\[7\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { usedw[7] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { usedw[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "wrreq " "Info: Pin wrreq not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 43 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "wrreq" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { wrreq } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { wrreq } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "clock " "Info: Pin clock not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 45 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clock" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { clock } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { clock } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "rdreq " "Info: Pin rdreq not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 44 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rdreq" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { rdreq } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { rdreq } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "data\[0\] " "Info: Pin data\[0\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 42 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "data\[0\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { data[0] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { data[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "data\[1\] " "Info: Pin data\[1\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 42 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "data\[1\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { data[1] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { data[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "data\[2\] " "Info: Pin data\[2\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 42 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "data\[2\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { data[2] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { data[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "data\[3\] " "Info: Pin data\[3\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 42 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "data\[3\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { data[3] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { data[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "data\[4\] " "Info: Pin data\[4\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 42 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "data\[4\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { data[4] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { data[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "data\[5\] " "Info: Pin data\[5\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 42 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "data\[5\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { data[5] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { data[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "data\[6\] " "Info: Pin data\[6\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 42 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "data\[6\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { data[6] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { data[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "data\[7\] " "Info: Pin data\[7\] not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 42 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "data\[7\]" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { data[7] } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { data[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "aclr " "Info: Pin aclr not assigned to an exact location on the device" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 46 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "aclr" } } } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" "" { Report "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1_cmp.qrpt" Compiler "fifo1" "UNKNOWN" "V1" "E:/毕业设计勿删/zhangguang/linshi/fifo1/db/fifo1.quartus_db" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/" "" "" { aclr } "NODE_NAME" } "" } } { "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" { Floorplan "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.fld" "" "" { aclr } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_GLOBAL_LINES_NEEDED_FOR_TORNADO_DQS" "0 " "Info: DQS I/O pins require 0 global routing resources." {  } {  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "clock Global clock in PIN 17 " "Info: Automatically promoted signal \"clock\" to use Global clock in PIN 17" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 45 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "aclr Global clock in PIN 16 " "Info: Automatically promoted signal \"aclr\" to use Global clock in PIN 16" {  } { { "fifo1.vhd" "" { Text "E:/毕业设计勿删/zhangguang/linshi/fifo1/fifo1.vhd" 46 -1 0 } }  } 0}