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📁 以CPLD器件EPM7128SLC84-15为核心实现的简易数字频率计
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--D1_counter[0] is divider1000:inst2|counter[0]
D1_counter[0]_reg_input = VCC;
D1_counter[0] = TFFE(D1_counter[0]_reg_input, GLOBAL(CLK), , , );


--F1_SIG2 is selector:inst16|SIG2
F1_SIG2_reg_input = VCC;
F1_SIG2 = TFFE(F1_SIG2_reg_input, SIGNAL, , , );


--D1_counter[1] is divider1000:inst2|counter[1]
D1_counter[1]_or_out = D1_counter[0];
D1_counter[1]_reg_input = D1_counter[1] $ D1_counter[1]_or_out;
D1_counter[1] = DFFE(D1_counter[1]_reg_input, GLOBAL(CLK), , , );


--D1_counter[2] is divider1000:inst2|counter[2]
D1_counter[2]_p1_out = !D1_counter[3] & D1_counter[8] & D1_counter[7] & D1_counter[6] & D1_counter[5] & D1_counter[4] & D1_counter[1] & D1_counter[0];
D1_counter[2]_p2_out = !D1_counter[1] & !D1_counter[2];
D1_counter[2]_p3_out = !D1_counter[0] & !D1_counter[2];
D1_counter[2]_p4_out = D1_counter[1] & D1_counter[0] & D1_counter[2];
D1_counter[2]_or_out = D1_counter[2]_p1_out # D1_counter[2]_p2_out # D1_counter[2]_p3_out # D1_counter[2]_p4_out;
D1_counter[2]_reg_input = !(D1_counter[2]_or_out);
D1_counter[2] = DFFE(D1_counter[2]_reg_input, GLOBAL(CLK), , , );


--D1_counter[3] is divider1000:inst2|counter[3]
D1_counter[3]_p1_out = D1_counter[2] & D1_counter[1] & D1_counter[0];
D1_counter[3]_or_out = D1_counter[3];
D1_counter[3]_reg_input = D1_counter[3]_p1_out $ D1_counter[3]_or_out;
D1_counter[3] = DFFE(D1_counter[3]_reg_input, GLOBAL(CLK), , , );


--D1_counter[4] is divider1000:inst2|counter[4]
D1_counter[4]_p1_out = D1_counter[8] & D1_counter[7] & D1_counter[6] & D1_counter[5] & !D1_counter[3] & !D1_counter[2] & D1_counter[1] & D1_counter[4] & D1_counter[0];
D1_counter[4]_p2_out = D1_counter[3] & D1_counter[2] & D1_counter[1] & D1_counter[0];
D1_counter[4]_or_out = D1_counter[4]_p1_out # D1_counter[4]_p2_out;
D1_counter[4]_reg_input = D1_counter[4]_or_out;
D1_counter[4] = TFFE(D1_counter[4]_reg_input, GLOBAL(CLK), , , );


--D1_counter[5] is divider1000:inst2|counter[5]
D1_counter[5]_p1_out = D1_counter[8] & D1_counter[7] & D1_counter[6] & !D1_counter[3] & !D1_counter[2] & D1_counter[4] & D1_counter[1] & D1_counter[5] & D1_counter[0];
D1_counter[5]_p2_out = D1_counter[3] & D1_counter[2] & D1_counter[4] & D1_counter[1] & D1_counter[0];
D1_counter[5]_or_out = D1_counter[5]_p1_out # D1_counter[5]_p2_out;
D1_counter[5]_reg_input = D1_counter[5]_or_out;
D1_counter[5] = TFFE(D1_counter[5]_reg_input, GLOBAL(CLK), , , );


--D1_counter[6] is divider1000:inst2|counter[6]
D1_counter[6]_p1_out = D1_counter[8] & D1_counter[7] & !D1_counter[3] & !D1_counter[2] & D1_counter[5] & D1_counter[4] & D1_counter[1] & D1_counter[6] & D1_counter[0];
D1_counter[6]_p2_out = D1_counter[3] & D1_counter[2] & D1_counter[5] & D1_counter[4] & D1_counter[1] & D1_counter[0];
D1_counter[6]_or_out = D1_counter[6]_p1_out # D1_counter[6]_p2_out;
D1_counter[6]_reg_input = D1_counter[6]_or_out;
D1_counter[6] = TFFE(D1_counter[6]_reg_input, GLOBAL(CLK), , , );


--D1_counter[7] is divider1000:inst2|counter[7]
D1_counter[7]_p1_out = D1_counter[8] & !D1_counter[3] & !D1_counter[2] & D1_counter[6] & D1_counter[5] & D1_counter[4] & D1_counter[1] & D1_counter[7] & D1_counter[0];
D1_counter[7]_p2_out = D1_counter[3] & D1_counter[2] & D1_counter[6] & D1_counter[5] & D1_counter[4] & D1_counter[1] & D1_counter[0];
D1_counter[7]_or_out = D1_counter[7]_p1_out # D1_counter[7]_p2_out;
D1_counter[7]_reg_input = D1_counter[7]_or_out;
D1_counter[7] = TFFE(D1_counter[7]_reg_input, GLOBAL(CLK), , , );


--D1_counter[8] is divider1000:inst2|counter[8]
D1_counter[8]_p1_out = D1_counter[7] & D1_counter[6] & D1_counter[5] & D1_counter[4] & !D1_counter[3] & !D1_counter[2] & D1_counter[1] & D1_counter[8] & D1_counter[0];
D1_counter[8]_p2_out = D1_counter[7] & D1_counter[6] & D1_counter[5] & D1_counter[4] & D1_counter[3] & D1_counter[2] & D1_counter[1] & D1_counter[0];
D1_counter[8]_or_out = D1_counter[8]_p1_out # D1_counter[8]_p2_out;
D1_counter[8]_reg_input = D1_counter[8]_or_out;
D1_counter[8] = TFFE(D1_counter[8]_reg_input, GLOBAL(CLK), , , );


--D1_clk_o is divider1000:inst2|clk_o
D1_clk_o_p1_out = !D1_counter[3] & !D1_counter[2] & D1_counter[8] & D1_counter[7] & D1_counter[6] & D1_counter[5] & D1_counter[4] & D1_counter[1] & D1_counter[0];
D1_clk_o_or_out = D1_clk_o_p1_out;
D1_clk_o_reg_input = D1_clk_o_or_out;
D1_clk_o = TFFE(D1_clk_o_reg_input, GLOBAL(CLK), , , );


--B1_POS[0] is dispselector:inst|POS[0]
B1_POS[0]_p1_out = B1_POS[1] & B1_POS[2] & !B1_POS[0];
B1_POS[0]_or_out = B1_POS[0]_p1_out;
B1_POS[0]_reg_input = !B1_POS[0]_or_out;
B1_POS[0] = TFFE(B1_POS[0]_reg_input, D1_clk_o, , , );


--G1_dffs[0] is divider2:inst1|lpm_counter:counter_rtl_0|dffs[0]
G1_dffs[0]_reg_input = VCC;
G1_dffs[0] = TFFE(G1_dffs[0]_reg_input, D1_clk_o, , , );


--G1_dffs[1] is divider2:inst1|lpm_counter:counter_rtl_0|dffs[1]
G1_dffs[1]_or_out = G1_dffs[0];
G1_dffs[1]_reg_input = G1_dffs[1]_or_out;
G1_dffs[1] = TFFE(G1_dffs[1]_reg_input, D1_clk_o, , , );


--B1_POS[1] is dispselector:inst|POS[1]
B1_POS[1]_p1_out = !B1_POS[2] & B1_POS[1] & !B1_POS[0];
B1_POS[1]_p2_out = !B1_POS[2] & !B1_POS[1] & B1_POS[0];
B1_POS[1]_or_out = B1_POS[1]_p1_out # B1_POS[1]_p2_out;
B1_POS[1]_reg_input = B1_POS[1]_or_out;
B1_POS[1] = DFFE(B1_POS[1]_reg_input, D1_clk_o, , , );


--B1L3 is dispselector:inst|CATSEL[2]~61
B1L3_p1_out = B1_POS[1] & !B1_POS[0];
B1L3_or_out = B1L3_p1_out;
B1L3 = !(B1L3_or_out);


--B1L4 is dispselector:inst|CATSEL[3]~64
B1L4_p1_out = B1_POS[1] & B1_POS[0];
B1L4_or_out = B1L4_p1_out;
B1L4 = !(B1L4_or_out);


--G1_dffs[2] is divider2:inst1|lpm_counter:counter_rtl_0|dffs[2]
G1_dffs[2]_p1_out = G1_dffs[1] & G1_dffs[0];
G1_dffs[2]_or_out = G1_dffs[2]_p1_out;
G1_dffs[2]_reg_input = G1_dffs[2]_or_out;
G1_dffs[2] = TFFE(G1_dffs[2]_reg_input, D1_clk_o, , , );


--B1_POS[2] is dispselector:inst|POS[2]
B1_POS[2]_p1_out = !B1_POS[1] & !B1_POS[2];
B1_POS[2]_p2_out = !B1_POS[2] & !B1_POS[0];
B1_POS[2]_p4_out = !B1_POS[1] & !B1_POS[0];
B1_POS[2]_or_out = B1_POS[2]_p1_out # B1_POS[2]_p2_out # B1_POS[2]_p4_out;
B1_POS[2]_reg_input = !B1_POS[2]_or_out;
B1_POS[2] = TFFE(B1_POS[2]_reg_input, D1_clk_o, , , );


--B1L5 is dispselector:inst|CATSEL[4]~67
B1L5_p1_out = B1_POS[2] & !B1_POS[0];
B1L5_or_out = B1L5_p1_out;
B1L5 = !(B1L5_or_out);


--B1L6 is dispselector:inst|CATSEL[5]~70
B1L6_p1_out = B1_POS[2] & B1_POS[0];
B1L6_or_out = B1L6_p1_out;
B1L6 = !(B1L6_or_out);


--B1L1 is dispselector:inst|CATSEL[0]~73
B1L1_p1_out = !B1_POS[2] & !B1_POS[1] & !B1_POS[0];
B1L1_or_out = B1L1_p1_out;
B1L1 = !(B1L1_or_out);


--B1L2 is dispselector:inst|CATSEL[1]~76
B1L2_p1_out = !B1_POS[2] & !B1_POS[1] & B1_POS[0];
B1L2_or_out = B1L2_p1_out;
B1L2 = !(B1L2_or_out);


--G1_dffs[3] is divider2:inst1|lpm_counter:counter_rtl_0|dffs[3]
G1_dffs[3]_p1_out = G1_dffs[2] & G1_dffs[1] & G1_dffs[0];
G1_dffs[3]_or_out = G1_dffs[3]_p1_out;
G1_dffs[3]_reg_input = G1_dffs[3]_or_out;
G1_dffs[3] = TFFE(G1_dffs[3]_reg_input, D1_clk_o, , , );


--G1_dffs[4] is divider2:inst1|lpm_counter:counter_rtl_0|dffs[4]
G1_dffs[4]_p1_out = G1_dffs[3] & G1_dffs[2] & G1_dffs[1] & G1_dffs[0];
G1_dffs[4]_or_out = G1_dffs[4]_p1_out;
G1_dffs[4]_reg_input = G1_dffs[4]_or_out;
G1_dffs[4] = TFFE(G1_dffs[4]_reg_input, D1_clk_o, , , );


--G1_dffs[5] is divider2:inst1|lpm_counter:counter_rtl_0|dffs[5]
G1_dffs[5]_p1_out = G1_dffs[4] & G1_dffs[3] & G1_dffs[2] & G1_dffs[1] & G1_dffs[0];
G1_dffs[5]_or_out = G1_dffs[5]_p1_out;
G1_dffs[5]_reg_input = G1_dffs[5]_or_out;
G1_dffs[5] = TFFE(G1_dffs[5]_reg_input, D1_clk_o, , , );


--G1_dffs[6] is divider2:inst1|lpm_counter:counter_rtl_0|dffs[6]
G1_dffs[6]_p1_out = G1_dffs[5] & G1_dffs[4] & G1_dffs[3] & G1_dffs[2] & G1_dffs[1] & G1_dffs[0];
G1_dffs[6]_or_out = G1_dffs[6]_p1_out;
G1_dffs[6]_reg_input = G1_dffs[6]_or_out;
G1_dffs[6] = TFFE(G1_dffs[6]_reg_input, D1_clk_o, , , );


--G1_dffs[7] is divider2:inst1|lpm_counter:counter_rtl_0|dffs[7]
G1_dffs[7]_p1_out = G1_dffs[6] & G1_dffs[5] & G1_dffs[4] & G1_dffs[3] & G1_dffs[2] & G1_dffs[1] & G1_dffs[0];
G1_dffs[7]_or_out = G1_dffs[7]_p1_out;
G1_dffs[7]_reg_input = G1_dffs[7]_or_out;
G1_dffs[7] = TFFE(G1_dffs[7]_reg_input, D1_clk_o, , , );


--G1_dffs[8] is divider2:inst1|lpm_counter:counter_rtl_0|dffs[8]
G1_dffs[8]_p1_out = G1_dffs[7] & G1_dffs[6] & G1_dffs[5] & G1_dffs[4] & G1_dffs[3] & G1_dffs[2] & G1_dffs[1] & G1_dffs[0];
G1_dffs[8]_or_out = G1_dffs[8]_p1_out;
G1_dffs[8]_reg_input = G1_dffs[8]_or_out;
G1_dffs[8] = TFFE(G1_dffs[8]_reg_input, D1_clk_o, , , );


--G1_dffs[9] is divider2:inst1|lpm_counter:counter_rtl_0|dffs[9]
G1_dffs[9]_p1_out = G1_dffs[8] & G1_dffs[7] & G1_dffs[6] & G1_dffs[5] & G1_dffs[4] & G1_dffs[3] & G1_dffs[2] & G1_dffs[1] & G1_dffs[0];
G1_dffs[9]_or_out = G1_dffs[9]_p1_out;
G1_dffs[9]_reg_input = G1_dffs[9]_or_out;
G1_dffs[9] = TFFE(G1_dffs[9]_reg_input, D1_clk_o, , , );


--C1_oCLK is divider2:inst1|oCLK
C1_oCLK_p1_out = G1_dffs[9] & G1_dffs[8] & G1_dffs[7] & G1_dffs[6] & G1_dffs[5] & G1_dffs[4];
C1_oCLK_p2_out = G1_dffs[9] & G1_dffs[8] & G1_dffs[7] & G1_dffs[6] & G1_dffs[5] & G1_dffs[3];
C1_oCLK_or_out = C1_oCLK_p1_out # C1_oCLK_p2_out;
C1_oCLK_reg_input = !(C1_oCLK_or_out);
C1_oCLK = DFFE(C1_oCLK_reg_input, D1_clk_o, , , );


--E1_cntbuf[0] is counter:inst10|cntbuf[0]
E1_cntbuf[0]_reg_input = VCC;
E1_cntbuf[0]_p3_out = F1L4 & F1L5;
E1_cntbuf[0]_p2_out = F1L1 & F1L2 & F1L3;
E1_cntbuf[0] = TFFE(E1_cntbuf[0]_reg_input, E1_cntbuf[0]_p3_out, !E1_cntbuf[0]_p2_out, , );


--F1L4 is selector:inst16|Pulse~15
F1L4 = EXP(!SWITCH[0] & !SIGNAL);


--F1L5 is selector:inst16|Pulse~16
F1L5 = EXP(SWITCH[0] & !GLOBAL(CLK));


--F1L1 is selector:inst16|En~193
F1L1 = EXP(C1_oCLK & !SWITCH[0]);


--F1L2 is selector:inst16|En~194
F1L2 = EXP(F1_SIG2 & SWITCH[0] & !SWITCH[1]);


--F1L3 is selector:inst16|En~195
F1L3 = EXP(SWITCH[0] & SWITCH[1] & SIGNAL);


--E1_COUNT[0] is counter:inst10|COUNT[0]
E1_COUNT[0]_or_out = E1_cntbuf[0];
E1_COUNT[0]_reg_input = E1_COUNT[0]_or_out;
E1_COUNT[0]_p3_out = F1L1 & F1L2 & F1L3;
E1_COUNT[0] = DFFE(E1_COUNT[0]_reg_input, E1_COUNT[0]_p3_out, , , );


--E1_cntbuf[1] is counter:inst10|cntbuf[1]
E1_cntbuf[1]_p1_out = E1_cntbuf[3] & !E1_cntbuf[2] & !E1_cntbuf[1];
E1_cntbuf[1]_or_out = E1_cntbuf[1]_p1_out # !E1_cntbuf[0];
E1_cntbuf[1]_reg_input = !E1_cntbuf[1]_or_out;
E1_cntbuf[1]_p3_out = F1L4 & F1L5;
E1_cntbuf[1]_p2_out = F1L1 & F1L2 & F1L3;
E1_cntbuf[1] = TFFE(E1_cntbuf[1]_reg_input, E1_cntbuf[1]_p3_out, !E1_cntbuf[1]_p2_out, , );


--E1_COUNT[1] is counter:inst10|COUNT[1]
E1_COUNT[1]_or_out = E1_cntbuf[1];
E1_COUNT[1]_reg_input = E1_COUNT[1]_or_out;
E1_COUNT[1]_p3_out = F1L1 & F1L2 & F1L3;
E1_COUNT[1] = DFFE(E1_COUNT[1]_reg_input, E1_COUNT[1]_p3_out, , , );


--E1_cntbuf[2] is counter:inst10|cntbuf[2]
E1_cntbuf[2]_p1_out = E1_cntbuf[0] & E1_cntbuf[1];
E1_cntbuf[2]_or_out = E1_cntbuf[2]_p1_out;
E1_cntbuf[2]_reg_input = E1_cntbuf[2]_or_out;
E1_cntbuf[2]_p3_out = F1L4 & F1L5;
E1_cntbuf[2]_p2_out = F1L1 & F1L2 & F1L3;
E1_cntbuf[2] = TFFE(E1_cntbuf[2]_reg_input, E1_cntbuf[2]_p3_out, !E1_cntbuf[2]_p2_out, , );


--E1_COUNT[2] is counter:inst10|COUNT[2]
E1_COUNT[2]_or_out = E1_cntbuf[2];
E1_COUNT[2]_reg_input = E1_COUNT[2]_or_out;
E1_COUNT[2]_p3_out = F1L1 & F1L2 & F1L3;
E1_COUNT[2] = DFFE(E1_COUNT[2]_reg_input, E1_COUNT[2]_p3_out, , , );


--E1_cntbuf[3] is counter:inst10|cntbuf[3]
E1_cntbuf[3]_p1_out = E1_cntbuf[2] & E1_cntbuf[0] & E1_cntbuf[1];
E1_cntbuf[3]_p4_out = !E1_cntbuf[2] & E1_cntbuf[0] & !E1_cntbuf[1] & E1_cntbuf[3];
E1_cntbuf[3]_or_out = E1_cntbuf[3]_p1_out # E1_cntbuf[3]_p4_out;
E1_cntbuf[3]_reg_input = E1_cntbuf[3]_or_out;
E1_cntbuf[3]_p3_out = F1L4 & F1L5;
E1_cntbuf[3]_p2_out = F1L1 & F1L2 & F1L3;
E1_cntbuf[3] = TFFE(E1_cntbuf[3]_reg_input, E1_cntbuf[3]_p3_out, !E1_cntbuf[3]_p2_out, , );


--E1_COUNT[3] is counter:inst10|COUNT[3]
E1_COUNT[3]_or_out = E1_cntbuf[3];
E1_COUNT[3]_reg_input = E1_COUNT[3]_or_out;
E1_COUNT[3]_p3_out = F1L1 & F1L2 & F1L3;
E1_COUNT[3] = DFFE(E1_COUNT[3]_reg_input, E1_COUNT[3]_p3_out, , , );


--E1_C is counter:inst10|C
E1_C_p0_out = SWITCH[0] & SWITCH[1] & !SIGNAL & E1_C;
E1_C_p1_out = E1_cntbuf[0] & E1_cntbuf[3] & !E1_cntbuf[1] & !E1_cntbuf[2] & SWITCH[0] & SWITCH[1] & SIGNAL;
E1_C_p2_out = !SWITCH[0] & !C1_oCLK & E1_C;
E1_C_p4_out = SWITCH[0] & !SWITCH[1] & E1_C & !F1_SIG2;
E1_C_or_out = E1L21 # E1_C_p0_out # E1_C_p1_out # E1_C_p2_out # E1_C_p4_out;
E1_C_reg_input = E1_C_or_out;
E1_C_p3_out = F1L4 & F1L5;
E1_C = DFFE(E1_C_reg_input, E1_C_p3_out, , , );


--E2_cntbuf[0] is counter:inst11|cntbuf[0]
E2_cntbuf[0]_reg_input = VCC;
E2_cntbuf[0]_p2_out = F1L1 & F1L2 & F1L3;
E2_cntbuf[0] = TFFE(E2_cntbuf[0]_reg_input, E1_C, !E2_cntbuf[0]_p2_out, , );


--E2_COUNT[0] is counter:inst11|COUNT[0]
E2_COUNT[0]_or_out = E2_cntbuf[0];
E2_COUNT[0]_reg_input = E2_COUNT[0]_or_out;
E2_COUNT[0]_p3_out = F1L1 & F1L2 & F1L3;
E2_COUNT[0] = DFFE(E2_COUNT[0]_reg_input, E2_COUNT[0]_p3_out, , , );


--E2_cntbuf[1] is counter:inst11|cntbuf[1]
E2_cntbuf[1]_p1_out = E2_cntbuf[3] & !E2_cntbuf[2] & !E2_cntbuf[1];
E2_cntbuf[1]_or_out = E2_cntbuf[1]_p1_out # !E2_cntbuf[0];
E2_cntbuf[1]_reg_input = !E2_cntbuf[1]_or_out;
E2_cntbuf[1]_p2_out = F1L1 & F1L2 & F1L3;
E2_cntbuf[1] = TFFE(E2_cntbuf[1]_reg_input, E1_C, !E2_cntbuf[1]_p2_out, , );


--E2_COUNT[1] is counter:inst11|COUNT[1]
E2_COUNT[1]_or_out = E2_cntbuf[1];
E2_COUNT[1]_reg_input = E2_COUNT[1]_or_out;
E2_COUNT[1]_p3_out = F1L1 & F1L2 & F1L3;
E2_COUNT[1] = DFFE(E2_COUNT[1]_reg_input, E2_COUNT[1]_p3_out, , , );


--E2_cntbuf[2] is counter:inst11|cntbuf[2]
E2_cntbuf[2]_p1_out = E2_cntbuf[0] & E2_cntbuf[1];
E2_cntbuf[2]_or_out = E2_cntbuf[2]_p1_out;
E2_cntbuf[2]_reg_input = E2_cntbuf[2]_or_out;
E2_cntbuf[2]_p2_out = F1L1 & F1L2 & F1L3;
E2_cntbuf[2] = TFFE(E2_cntbuf[2]_reg_input, E1_C, !E2_cntbuf[2]_p2_out, , );


--E2_COUNT[2] is counter:inst11|COUNT[2]
E2_COUNT[2]_or_out = E2_cntbuf[2];
E2_COUNT[2]_reg_input = E2_COUNT[2]_or_out;
E2_COUNT[2]_p3_out = F1L1 & F1L2 & F1L3;
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