clock.qsf

来自「用Verilog HDL 实现时钟(时和分)」· QSF 代码 · 共 53 行

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		clock_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "MAX II"
set_global_assignment -name DEVICE EPM240T100C5
set_global_assignment -name TOP_LEVEL_ENTITY clock
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:15:24  JANUARY 20, 2009"
set_global_assignment -name LAST_QUARTUS_VERSION 7.2
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name VERILOG_FILE clock.v
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_location_assignment PIN_12 -to clk
set_location_assignment PIN_96 -to sl[3]
set_location_assignment PIN_95 -to sl[2]
set_location_assignment PIN_92 -to sl[1]
set_location_assignment PIN_91 -to sl[0]
set_location_assignment PIN_99 -to segdat[0]
set_location_assignment PIN_100 -to segdat[1]
set_location_assignment PIN_1 -to segdat[2]
set_location_assignment PIN_2 -to segdat[3]
set_location_assignment PIN_3 -to segdat[4]
set_location_assignment PIN_4 -to segdat[5]
set_location_assignment PIN_5 -to segdat[6]
set_location_assignment PIN_6 -to segdat[7]
set_location_assignment PIN_7 -to fm
set_location_assignment PIN_98 -to sl[5]
set_location_assignment PIN_97 -to sl[4]