atmega16.map.summary

来自「基于FPGA的DDS正弦信号发生器,信号失真小」· SUMMARY 代码 · 共 10 行

Analysis & Synthesis Status : Successful - Thu Nov 06 13:02:09 2008
Quartus II Version : 7.0 Build 33 02/05/2007 SJ Full Version
Revision Name : atmega16
Top-level Entity Name : atmega16
Family : MAX II
Total logic elements : 185
Total pins : 20
Total virtual pins : 0
UFM blocks : 0