atmega16.fit.summary

来自「基于FPGA的DDS正弦信号发生器,信号失真小」· SUMMARY 代码 · 共 12 行

Fitter Status : Successful - Thu Nov 06 13:02:13 2008
Quartus II Version : 7.0 Build 33 02/05/2007 SJ Full Version
Revision Name : atmega16
Top-level Entity Name : atmega16
Family : MAX II
Device : EPM240T100C5
Timing Models : Final
Total logic elements : 180 / 240 ( 75 % )
Total pins : 20 / 80 ( 25 % )
Total virtual pins : 0
UFM blocks : 0 / 1 ( 0 % )