test.v

来自「SDRAM控制器的源代码打包下载」· Verilog 代码 · 共 23 行

/******************************************************************************
*
*    File Name:  TEST.V
*      Version:  1.0
*         Date:  May 13th, 1998
*        Model:  BUS Functional
*    Simulator:  Model Technology VLOG (PC version 4.7h)
*
* Dependencies:  MT48LC1M16B1.V
*
*       Author:  Son P. Huynh
*        Email:  [e-mail]
*        Phone:  [phone]
*      Company:  Micron Technology, Inc.
*
*  Description:  This is a testbench for MT48LC1M16A1.V
*
*   Disclaimer:  THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY 
*                WHATSOEVER AND MICRON SPECIFICALLY DISCLAIMS ANY 
*                IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
*                A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT.
*
*                Copyright