📄 mux24.vhd
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library ieee;
use ieee.std_logic_1164.all;
entity mux24 is
port(input :in std_logic_vector(1 downto 0);
result:out std_logic_vector(3 downto 0));
end mux24;
architecture one of mux24 is
begin
with input select
result <= "1110" when "00" ,
"1101" when "01" ,
"1011" when "10" ,
"0111" when "11" ,
"1111" when others;
end one;
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