mux21.vhd

来自「4位电子智能密码锁」· VHDL 代码 · 共 23 行

--______________________________________________________________
-- MUX21.VHD
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY MUX21 IS
PORT (  A, B, S : IN STD_LOGIC;
       RST, EN : IN STD_LOGIC;
             Y : OUT STD_LOGIC );
END;

ARCHITECTURE ONE OF MUX21 IS
BEGIN
PROCESS (RST, A, B, S, EN )
BEGIN
IF RST='1' THEN Y<=A;
  ELSIF EN='1' THEN
IF S='1' AND S'EVENT THEN Y<=B; 
END IF;
END IF;
END PROCESS;
END;
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