hdpdeps.ref

来自「采用VHDL语言设计一个4通道的数据采集控制模块。系统的功能描述如下： 1.系」· REF 代码 · 共 15 行

V2 6
FL G:/pengfu/EDA/DAQ_pengfu/clk_div_10.vhd 2008/12/19.10:32:10 H.38
EN isim_temp/CLK_DIV_10 1229656891 FL G:/pengfu/EDA/DAQ_pengfu/clk_div_10.vhd \
      PB ieee/STD_LOGIC_1164 1106546471 PB ieee/STD_LOGIC_ARITH 1106546473 \
      PB ieee/STD_LOGIC_UNSIGNED 1106546479
AR isim_temp/CLK_DIV_10/BEHAVIORAL 1229656892 FL G:/pengfu/EDA/DAQ_pengfu/clk_div_10.vhd \
      EN isim_temp/CLK_DIV_10 1229656891
FL E:/pengfu/EDA/期末报告/DAQ_pengfu/../../DAQ_state/FOUR_0.vhd 2009/01/01.13:24:38 H.38
EN isim_temp/FOUR_0 1230787493 \
      FL E:/pengfu/EDA/期末报告/DAQ_pengfu/../../DAQ_state/FOUR_0.vhd \
      PB ieee/STD_LOGIC_1164 1106546471
AR isim_temp/FOUR_0/BEHAVIOR 1230787494 \
      FL E:/pengfu/EDA/期末报告/DAQ_pengfu/../../DAQ_state/FOUR_0.vhd \
      EN isim_temp/FOUR_0 1230787493