display.vhd

使用VHDL开发的简易数字时钟软件

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY display IS
 PORT(SCLK:      IN STD_LOGIC;                               --scan frequency,about 1khz
      RESET:     IN STD_LOGIC;            
      SECDIS:    OUT STD_LOGIC_VECTOR(7 DOWNTO 0);           --8bits to led display
      ADDSEL:    OUT STD_LOGIC_VECTOR(5 DOWNTO 0);           --address line for scanning 6 leds
      hourhdis:  IN INTEGER RANGE 0 TO 2;                    --time information recevied from module "clock"
      hourldis,minldis,secldis:  IN INTEGER RANGE 0 TO 9;
      minhdis,sechdis:  IN INTEGER RANGE 0 TO 5);
 PROCEDURE LEDDISP(NUMBER:INTEGER RANGE 0 TO 9)IS            --this procedure will transform data to format of display
  BEGIN
      CASE NUMBER IS
        WHEN 0=>       --0
          SECDIS<="00111111";
        WHEN 1=>       --1
          SECDIS<="00000110";
        WHEN 2=>       --2
          SECDIS<="01011011";
        WHEN 3=>       --3
          SECDIS<="01001111";
        WHEN 4=>       --4
          SECDIS<="01100110";
        WHEN 5=>       --5
          SECDIS<="01101101";
        WHEN 6=>       --6
          SECDIS<="01111101";
        WHEN 7=>       --7
          SECDIS<="00000111";
        WHEN 8=>       --8
          SECDIS<="01111111";
        WHEN 9=>       --9
          SECDIS<="01101111";
        END CASE;
 END LEDDISP;
END display;
ARCHITECTURE archi of display IS
  TYPE STATE IS (S1,S2,S3,S4,S5,S6);                         --six states correspond to six led display
  SIGNAL NEXSTA,CURSTA:STATE;
BEGIN
 SCAN:
   PROCESS(SCLK)
     BEGIN
       IF RESET='1' THEN
          NEXSTA<=S1;
       ELSIF (SCLK='1' AND SCLK'EVENT) THEN
          CURSTA<=NEXSTA;
       END IF;
       CASE CURSTA IS
            WHEN S1 =>
              ADDSEL<="111110";
              LEDDISP(hourhdis);
              NEXSTA<=S2;
            WHEN S2 =>
              ADDSEL<="111101";
              LEDDISP(hourldis);
              NEXSTA<=S3;
            WHEN S3 =>
              ADDSEL<="111011";
              LEDDISP(minhdis);
              NEXSTA<=S4;
            WHEN S4 =>
              ADDSEL<="110111";
              LEDDISP(minldis);
              NEXSTA<=S5;
            WHEN S5 =>
              ADDSEL<="101111";
              LEDDISP(sechdis);
              NEXSTA<=S6;
            WHEN S6 =>
              ADDSEL<="011111";
              LEDDISP(secldis);
              NEXSTA<=S1;
            WHEN OTHERS =>
              NULL;
         END CASE;
   END PROCESS;
END archi;