defs.v

来自「systemverilog程序」· Verilog 代码 · 共 19 行

// defs.v
//
// Globally visible typedefs for the CORDIC rotator model,
// bus interface and associated testbench
//
// Revision information:
// =====================
//
// 0.0  15-Jan-2004  Jonathan Bromley
//    First version

// Signed data, used for data bus and many internals of rotator
//
typedef logic signed [15:0] T_sdata;

// Unsigned data, used to represent addresses on the bus
//
typedef logic        [15:0] T_udata;