alu.vhd

ALU加法器的设计

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;

LIBRARY LPM;
USE LPM.LPM_COMPONENTS.ALL;

ENTITY ALU IS
	GENERIC (width:NATURAL:=7; op_w:NATURAL:=2);
	PORT ( 
	      a, b    : IN std_logic_vector(width DOWNTO 0);
	      op      : IN std_logic_vector(op_w DOWNTO 0);
	      result  : OUT std_logic_vector(width DOWNTO 0);
	      z       : OUT std_logic ;
          c      : OUT std_logic
         );
END ALU;

ARCHITECTURE struct OF ALU IS

	CONSTANT ALU_ADD  : STD_LOGIC_VECTOR(op_w DOWNTO 0) := "000";
	CONSTANT ALU_SUB  : STD_LOGIC_VECTOR(op_w DOWNTO 0) := "001";
	CONSTANT ALU_ADDU : STD_LOGIC_VECTOR(op_w DOWNTO 0) := "010";
	CONSTANT ALU_SUBU : STD_LOGIC_VECTOR(op_w DOWNTO 0) := "011";
	CONSTANT ALU_AND  : STD_LOGIC_VECTOR(op_w DOWNTO 0) := "100";		
	CONSTANT ALU_OR   : STD_LOGIC_VECTOR(op_w DOWNTO 0) := "101";		
	CONSTANT ALU_XOR  : STD_LOGIC_VECTOR(op_w DOWNTO 0) := "110";		
	CONSTANT ALU_NOTA : STD_LOGIC_VECTOR(op_w DOWNTO 0) := "111";
	CONSTANT NC8      : STD_LOGIC_VECTOR(width DOWNTO 0):= "--------";
	
	COMPONENT lpm_add_sub
	GENERIC (
		lpm_width		: NATURAL;
		lpm_direction	: STRING;
		lpm_type		: STRING;
		lpm_hint		: STRING
	);
	PORT (
		dataa	: IN STD_LOGIC_VECTOR (width DOWNTO 0);
		datab	: IN STD_LOGIC_VECTOR (width DOWNTO 0);
		cin	    : IN STD_LOGIC ;
		cout, overflow : OUT STD_LOGIC;
		result	: OUT STD_LOGIC_VECTOR (width DOWNTO 0)
	);
	END COMPONENT;
	
	SIGNAL ADDER_out_overflow  : STD_LOGIC;
	SIGNAL ADDER_out_cout      : STD_LOGIC;
	SIGNAL ADDER_out_result    : STD_LOGIC_VECTOR(width DOWNTO 0);
	SIGNAL ADDER_in_dataa      : STD_LOGIC_VECTOR(width DOWNTO 0);
	SIGNAL ADDER_in_datab      : STD_LOGIC_VECTOR(width DOWNTO 0);
	SIGNAL ADDER_in_cin        : STD_LOGIC;
	SIGNAL r                   : STD_LOGIC_VECTOR(width DOWNTO 0);
	
	
BEGIN
	
	ADDER_in_dataa <= a;
	ADDER_in_datab <= NOT b WHEN op=ALU_SUB  ELSE
	                  NOT b WHEN op=ALU_SUBU ELSE 
	                  b;
	ADDER_in_cin   <= '1' WHEN op=ALU_SUB  ELSE
	                  '1' WHEN op=ALU_SUBU ELSE 
	                  '0';	
	
	ALU_ADDER : lpm_add_sub
	GENERIC MAP (
		lpm_width => (width+1),
		lpm_direction => "ADD",
		lpm_type => "LPM_ADD_SUB",
		lpm_hint => "ONE_INPUT_IS_CONSTANT=NO,CIN_USED=YES"
	)
	PORT MAP (
		dataa => ADDER_in_dataa,
		datab => ADDER_in_datab,
		cin => ADDER_in_cin,
		overflow => ADDER_out_overflow,
		cout => ADDER_out_cout,
		result => ADDER_out_result
	);
	
    
	
	RESULT_MUX : PROCESS (a, b, ADDER_out_result,op) IS
	BEGIN
		CASE op IS
		WHEN ALU_ADD | ALU_SUB | ALU_ADDU | ALU_SUBU =>
			r <= ADDER_out_result;
		WHEN ALU_AND =>
			r <= a AND b;
		WHEN ALU_OR =>
			r <= a OR b;
		WHEN ALU_XOR => 
			r <= a XOR b;
		WHEN ALU_NOTA =>
			r <= NOT a;
		WHEN OTHERS =>
			r <= NC8;
		END CASE;
	END PROCESS;
	
	z <= '1' WHEN r=NC8 ELSE '0';
	c <= ADDER_out_cout WHEN op=ALU_ADD;
	result <= r;
END struct;