mips_top.fit.summary

是verilog做的简化mips32指令系统。 有些小问题

Fitter Status : Successful - Wed Dec 17 23:26:25 2008
Quartus II Version : 7.2 Build 151 09/26/2007 SJ Full Version
Revision Name : Mips_Top
Top-level Entity Name : Mips_Top
Family : Stratix II
Device : EP2S15F484C3
Timing Models : Final
Logic utilization : 39 %
    Combinational ALUTs : 2,694 / 12,480 ( 22 % )
    Dedicated logic registers : 2,875 / 12,480 ( 23 % )
Total registers : 2875
Total pins : 34 / 343 ( 10 % )
Total virtual pins : 0
Total block memory bits : 33,280 / 419,328 ( 8 % )
DSP block 9-bit elements : 0 / 96 ( 0 % )
Total PLLs : 0 / 6 ( 0 % )
Total DLLs : 0 / 2 ( 0 % )