mips_top.map.smsg

来自「是verilog做的简化mips32指令系统。 有些小问题」· SMSG 代码 · 共 4 行

Warning (10268): Verilog HDL information at clock_gen.v(13): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at Ifetch32.v(29): Always Construct contains both blocking and non-blocking assignments
Warning (10236): Verilog HDL Implicit Net warning at Mips_Top.v(53): created implicit net for "rwds"