div_2n.fit.eqn

此程序实现的是任意进制的分频 进制的输入是任意选择的

--D1_q[7] is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|q[7] at LC8_B13
--operation mode is clrb_cntr

D1_q[7]_lut_out = (D1_q[7] $ D1L51) & A1L8;
D1_q[7] = DFFEA(D1_q[7]_lut_out, GLOBAL(clk), , , , , );


--D1_q[6] is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|q[6] at LC7_B13
--operation mode is clrb_cntr

D1_q[6]_lut_out = (D1_q[6] $ D1L31) & A1L8;
D1_q[6] = DFFEA(D1_q[6]_lut_out, GLOBAL(clk), , , , , );

--D1L51 is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT at LC7_B13
--operation mode is clrb_cntr

D1L51 = CARRY(D1_q[6] & D1L31);


--D1_q[5] is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|q[5] at LC6_B13
--operation mode is clrb_cntr

D1_q[5]_lut_out = (D1_q[5] $ D1L11) & A1L8;
D1_q[5] = DFFEA(D1_q[5]_lut_out, GLOBAL(clk), , , , , );

--D1L31 is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT at LC6_B13
--operation mode is clrb_cntr

D1L31 = CARRY(D1_q[5] & D1L11);


--D1_q[4] is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|q[4] at LC5_B13
--operation mode is clrb_cntr

D1_q[4]_lut_out = (D1_q[4] $ D1L9) & A1L8;
D1_q[4] = DFFEA(D1_q[4]_lut_out, GLOBAL(clk), , , , , );

--D1L11 is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT at LC5_B13
--operation mode is clrb_cntr

D1L11 = CARRY(D1_q[4] & D1L9);


--D1_q[3] is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|q[3] at LC4_B13
--operation mode is clrb_cntr

D1_q[3]_lut_out = (D1_q[3] $ D1L7) & A1L8;
D1_q[3] = DFFEA(D1_q[3]_lut_out, GLOBAL(clk), , , , , );

--D1L9 is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT at LC4_B13
--operation mode is clrb_cntr

D1L9 = CARRY(D1_q[3] & D1L7);


--D1_q[2] is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|q[2] at LC3_B13
--operation mode is clrb_cntr

D1_q[2]_lut_out = (D1_q[2] $ D1L5) & A1L8;
D1_q[2] = DFFEA(D1_q[2]_lut_out, GLOBAL(clk), , , , , );

--D1L7 is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT at LC3_B13
--operation mode is clrb_cntr

D1L7 = CARRY(D1_q[2] & D1L5);


--D1_q[1] is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|q[1] at LC2_B13
--operation mode is clrb_cntr

D1_q[1]_lut_out = (D1_q[1] $ D1L3) & A1L8;
D1_q[1] = DFFEA(D1_q[1]_lut_out, GLOBAL(clk), , , , , );

--D1L5 is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT at LC2_B13
--operation mode is clrb_cntr

D1L5 = CARRY(D1_q[1] & D1L3);


--D1_q[0] is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|q[0] at LC1_B13
--operation mode is clrb_cntr

D1_q[0]_lut_out = (!D1_q[0]) & A1L8;
D1_q[0] = DFFEA(D1_q[0]_lut_out, GLOBAL(clk), , , , , );

--D1L3 is lpm_counter:cnt_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT at LC1_B13
--operation mode is clrb_cntr

D1L3 = CARRY(D1_q[0]);


--clk_temp is clk_temp at LC2_B19
--operation mode is normal

clk_temp_lut_out = !A1L4 & !A1L5 & !A1L6 & !A1L7;
clk_temp = DFFEA(clk_temp_lut_out, GLOBAL(clk), , , , , );


--G3_cs_buffer[1] is lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC2_B10
--operation mode is arithmetic

G3_cs_buffer[1] = p[1] $ G3_cout[0];

--G3_cout[1] is lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[1] at LC2_B10
--operation mode is arithmetic

G3_cout[1] = CARRY(p[1] # G3_cout[0]);


--A1L4 is i~41 at LC3_B19
--operation mode is normal

A1L4 = D1_q[1] & (G3_cs_buffer[1] # E1_unreg_res_node[7] $ !D1_q[7]) # !D1_q[1] & (E1_unreg_res_node[7] $ !D1_q[7] # !G3_cs_buffer[1]);


--G3_cs_buffer[5] is lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] at LC6_B10
--operation mode is arithmetic

G3_cs_buffer[5] = p[5] $ G3_cout[4];

--G3_cout[5] is lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[5] at LC6_B10
--operation mode is arithmetic

G3_cout[5] = CARRY(p[5] # G3_cout[4]);


--G3_cs_buffer[0] is lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0] at LC1_B10
--operation mode is arithmetic

G3_cs_buffer[0] = p[0];

--G3_cout[0] is lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[0] at LC1_B10
--operation mode is arithmetic

G3_cout[0] = CARRY(p[0]);


--A1L5 is i~42 at LC4_B19
--operation mode is normal

A1L5 = D1_q[0] & (G3_cs_buffer[0] # D1_q[5] $ !G3_cs_buffer[5]) # !D1_q[0] & (D1_q[5] $ !G3_cs_buffer[5] # !G3_cs_buffer[0]);


--G3_cs_buffer[4] is lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC5_B10
--operation mode is arithmetic

G3_cs_buffer[4] = p[4] $ G3_cout[3];

--G3_cout[4] is lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[4] at LC5_B10
--operation mode is arithmetic

G3_cout[4] = CARRY(p[4] # G3_cout[3]);


--G3_cs_buffer[3] is lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC4_B10
--operation mode is arithmetic

G3_cs_buffer[3] = p[3] $ G3_cout[2];

--G3_cout[3] is lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[3] at LC4_B10
--operation mode is arithmetic

G3_cout[3] = CARRY(p[3] # G3_cout[2]);


--A1L6 is i~43 at LC5_B19
--operation mode is normal

A1L6 = D1_q[3] & (G3_cs_buffer[3] # D1_q[4] $ !G3_cs_buffer[4]) # !D1_q[3] & (D1_q[4] $ !G3_cs_buffer[4] # !G3_cs_buffer[3]);


--G3_cs_buffer[2] is lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC3_B10
--operation mode is arithmetic

G3_cs_buffer[2] = p[2] $ G3_cout[1];

--G3_cout[2] is lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[2] at LC3_B10
--operation mode is arithmetic

G3_cout[2] = CARRY(p[2] # G3_cout[1]);


--G3_cs_buffer[6] is lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] at LC7_B10
--operation mode is arithmetic

G3_cs_buffer[6] = p[6] $ G3_cout[5];

--G3_cout[6] is lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[6] at LC7_B10
--operation mode is arithmetic

G3_cout[6] = CARRY(p[6] # G3_cout[5]);


--A1L7 is i~44 at LC6_B19
--operation mode is normal

A1L7 = D1_q[6] & (G3_cs_buffer[6] # D1_q[2] $ !G3_cs_buffer[2]) # !D1_q[6] & (D1_q[2] $ !G3_cs_buffer[2] # !G3_cs_buffer[6]);


--A1L8 is i~45 at LC1_B19
--operation mode is normal

A1L8 = A1L4 # A1L5 # A1L6 # A1L7;


--E1_unreg_res_node[7] is lpm_add_sub:i_rtl_1|addcore:adder|unreg_res_node[7] at LC8_B10
--operation mode is normal

E1_unreg_res_node[7] = G3_cout[6] $ p[7];


--clk is clk at Pin_44
--operation mode is input

clk = INPUT();


--p[7] is p[7] at Pin_11
--operation mode is input

p[7] = INPUT();


--p[1] is p[1] at Pin_5
--operation mode is input

p[1] = INPUT();


--p[5] is p[5] at Pin_9
--operation mode is input

p[5] = INPUT();


--p[0] is p[0] at Pin_3
--operation mode is input

p[0] = INPUT();


--p[4] is p[4] at Pin_8
--operation mode is input

p[4] = INPUT();


--p[3] is p[3] at Pin_7
--operation mode is input

p[3] = INPUT();


--p[2] is p[2] at Pin_6
--operation mode is input

p[2] = INPUT();


--p[6] is p[6] at Pin_10
--operation mode is input

p[6] = INPUT();


--div2n is div2n at Pin_53
--operation mode is output

div2n = OUTPUT(clk_temp);